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Dashie der otter 5 years ago
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21 changed files with 56428 additions and 0 deletions
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  2. 54152
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  4. 374
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  5. 0
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  13. 63
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Debug.ebp
bin/Debug
chibios_template.depend
chibios_template.ebp
chibios_template.elay
chibios_template.layout
chibios_template_build_log.html
doxygen/doxyfile
doxygen/html
ext/ChibiOS
ext/ChibiOS_2.6.4
ext/ChibiOS_2.6.5.zip
src/Makefile
LOL

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<?xml version="1.0" encoding="UTF-8" standalone="yes" ?>
<CodeBlocks_project_file>
<FileVersion major="1" minor="6" />
<Project>
<Option title="shell" />
<Option execution_dir="src" />
<Option pch_mode="2" />
<Option compiler="arm-elf-gcc" />
<Build>
<Target title="Debug">
<Option output="bin/Debug/shell.elf" prefix_auto="0" extension_auto="0" />
<Option working_dir="src/" />
<Option object_output="obj/Debug/" />
<Option type="1" />
<Option compiler="arm-elf-gcc" />
<Option use_console_runner="0" />
<ExtraCommands>
<Add after="arm-none-eabi-objcopy -O ihex bin\Debug\shell.elf bin\Debug\output.hex" />
<Add after="arm-none-eabi-objcopy -O binary bin\Debug\shell.elf bin\Debug\output.bin" />
<Add after="cmd /c arm-none-eabi-objdump -x --syms bin\Debug\shell.elf &gt; bin\Debug\shell.dmp" />
<Mode after="always" />
</ExtraCommands>
<MakeCommands>
<Build command="$make -f $makefile" />
<CompileFile command="$make -f $makefile $file" />
<Clean command="$make -f $makefile clean" />
<DistClean command="$make -f $makefile distclean$target" />
<AskRebuildNeeded command="$make -q -f $makefile $target" />
<SilentBuild command="$make -f $makefile &gt; $(CMD_NULL)" />
</MakeCommands>
</Target>
</Build>
<VirtualTargets>
<Add alias="All" targets="Debug;" />
</VirtualTargets>
<Compiler>
<Add option="-mthumb" />
<Add option="-mno-thumb-interwork" />
<Add option="-fomit-frame-pointer" />
<Add option="-Wextra" />
<Add option="-Wall" />
<Add option="-g" />
<Add option="-mcpu=cortex-m4" />
<Add option="-fdata-sections" />
<Add option="-ffunction-sections" />
<Add option="-g3" />
<Add option="-ggdb" />
<Add option="-fno-common" />
<Add option="-falign-functions=16" />
<Add option="-DCORTEX_USE_FPU=FALSE" />
<Add option="-DTHUMB_PRESENT" />
<Add option="-DTHUMB_NO_INTERWORKING" />
<Add option="-DTHUMB" />
<Add directory="ext/ChibiOS/os/ports/GCC/ARMCMx/STM32F0xx/ld" />
<Add directory="ext/ChibiOS/os/ports/common/ARMCMx/CMSIS/include" />
<Add directory="ext/ChibiOS/os/ports/common/ARMCMx" />
<Add directory="ext/ChibiOS/os/ports/GCC/ARMCMx" />
<Add directory="ext/ChibiOS/os/ports/GCC/ARMCMx/STM32F4xx" />
<Add directory="ext/ChibiOS/os/kernel/include" />
<Add directory="ext/ChibiOS/test" />
<Add directory="ext/ChibiOS/os/hal/include" />
<Add directory="ext/ChibiOS/os/hal/platforms/STM32F4xx" />
<Add directory="ext/ChibiOS/os/hal/platforms/STM32" />
<Add directory="ext/ChibiOS/os/hal/platforms/STM32/GPIOv2" />
<Add directory="ext/ChibiOS/os/hal/platforms/STM32/I2Cv1" />
<Add directory="ext/ChibiOS/os/hal/platforms/STM32/OTGv1" />
<Add directory="ext/ChibiOS/os/hal/platforms/STM32/RTCv2" />
<Add directory="ext/ChibiOS/os/hal/platforms/STM32/SPIv1" />
<Add directory="ext/ChibiOS/os/hal/platforms/STM32/TIMv1" />
<Add directory="ext/ChibiOS/os/hal/platforms/STM32/USARTv1" />
<Add directory="ext/ChibiOS/boards/OLIMEX_STM32_E407_REV_D" />
<Add directory="ext/ChibiOS/os/various/devices_lib/accel" />
<Add directory="ext/ChibiOS/os/various" />
<Add directory="src" />
</Compiler>
<Linker>
<Add option='-Wl,--gc-sections,--script=&quot;ext\ChibiOS\os\ports\GCC\ARMCMx\STM32F4xx\ld\STM32F407xG.ld&quot;,--no-warn-mismatch,--library-path=../ext/ChibiOS/os/ports/GCC/ARMCMx' />
<Add option="-mcpu=cortex-m4" />
<Add option="-nostartfiles" />
<Add option="-fno-common" />
<Add option="-ffunction-sections" />
<Add option="-falign-functions=16" />
<Add option="-fomit-frame-pointer" />
<Add option="-mno-thumb-interwork" />
<Add option="-mthumb" />
<Add option="-fdata-sections" />
</Linker>
<Unit filename="ext/ChibiOS/boards/OLIMEX_STM32_E407_REV_D/board.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/platforms/STM32F4xx/adc_lld.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/platforms/STM32F4xx/ext_lld_isr.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/platforms/STM32F4xx/hal_lld.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/platforms/STM32F4xx/stm32_dma.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/platforms/STM32/GPIOv2/pal_lld.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/platforms/STM32/I2Cv1/i2c_lld.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/platforms/STM32/OTGv1/usb_lld.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/platforms/STM32/RTCv2/rtc_lld.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/platforms/STM32/SPIv1/spi_lld.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/platforms/STM32/TIMv1/gpt_lld.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/platforms/STM32/TIMv1/icu_lld.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/platforms/STM32/TIMv1/pwm_lld.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/platforms/STM32/USARTv1/serial_lld.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/platforms/STM32/USARTv1/uart_lld.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/platforms/STM32/can_lld.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/platforms/STM32/ext_lld.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/platforms/STM32/mac_lld.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/platforms/STM32/sdc_lld.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/src/adc.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/src/can.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/src/ext.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/src/gpt.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/src/hal.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/src/i2c.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/src/icu.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/src/mac.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/src/mmc_spi.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/src/mmcsd.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/src/pal.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/src/pwm.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/src/rtc.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/src/sdc.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/src/serial.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/src/serial_usb.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/src/spi.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/src/tm.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/src/uart.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/hal/src/usb.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/kernel/src/chcond.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/kernel/src/chdebug.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/kernel/src/chdynamic.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/kernel/src/chevents.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/kernel/src/chheap.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/kernel/src/chlists.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/kernel/src/chmboxes.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/kernel/src/chmemcore.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/kernel/src/chmempools.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/kernel/src/chmsg.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/kernel/src/chmtx.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/kernel/src/chqueues.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/kernel/src/chregistry.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/kernel/src/chschd.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/kernel/src/chsem.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/kernel/src/chsys.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/kernel/src/chthreads.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/kernel/src/chvt.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/ports/GCC/ARMCMx/STM32F4xx/vectors.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/ports/GCC/ARMCMx/chcore.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/ports/GCC/ARMCMx/chcore_v7m.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/ports/GCC/ARMCMx/crt0.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/ports/common/ARMCMx/nvic.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/various/chprintf.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/various/memstreams.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/os/various/shell.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/test/test.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/test/testbmk.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/test/testdyn.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/test/testevt.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/test/testheap.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/test/testmbox.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/test/testmsg.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/test/testmtx.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/test/testpools.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/test/testqueues.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/test/testsem.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="ext/ChibiOS/test/testthd.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="src/ADC.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="src/ADC.h">
<Option target="&lt;{~None~}&gt;" />
</Unit>
<Unit filename="src/I2C.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="src/Makefile">
<Option compile="1" />
<Option link="1" />
<Option target="&lt;{~None~}&gt;" />
</Unit>
<Unit filename="src/chconf.h">
<Option compile="1" />
<Option link="1" />
<Option target="&lt;{~None~}&gt;" />
</Unit>
<Unit filename="src/halconf.h">
<Option compile="1" />
<Option link="1" />
<Option target="&lt;{~None~}&gt;" />
</Unit>
<Unit filename="src/main.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="src/mcuconf.h">
<Option compile="1" />
<Option link="1" />
<Option target="&lt;{~None~}&gt;" />
</Unit>
<Unit filename="src/readme.txt">
<Option compile="1" />
<Option link="1" />
<Option target="&lt;{~None~}&gt;" />
</Unit>
<Unit filename="src/usbcfg.c">
<Option compilerVar="CC" />
</Unit>
<Unit filename="src/usbcfg.h">
<Option compile="1" />
<Option link="1" />
<Option target="&lt;{~None~}&gt;" />
</Unit>
<Extensions>
<code_completion />
<debugger>
<remote_debugging>
<options conn_type="0" serial_baud="115200" ip_address="localhost" ip_port="4242" extended_remote="1" />
</remote_debugging>
</debugger>
<envvars />
</Extensions>
</Project>
</CodeBlocks_project_file>

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- 0
doxygen/.git_keep View File


+ 0
- 0
ext/1-PUT CHIBIOS SRCS HERE.txt View File


+ 0
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ext/2-THE FOLDER NAME NEEDS TO BE.txt View File


+ 0
- 0
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+ 0
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+ 0
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+ 119
- 0
src/ADC.c View File

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#include <stdlib.h>
#include "ch.h"
#include "hal.h"
#include "chprintf.h"

#include "ADC.h"

// Create buffer to store ADC results. This is
// one-dimensional interleaved array
#define ADC_GRP1_BUF_DEPTH 2014*2*4 // depth of buffer
#define ADC_GRP1_NUM_CHANNELS 1 // number of used ADC channels
adcsample_t samples_singlescan[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH]; // results array

/*
* Internal Reference Voltage, according to ST this is 1.21V typical
* with -40°C<T<+105°C its Min: 1.18V, Typ 1.21V, Max: 1.24V
*/
#define VREFINT 121
/*
* The measured Value is initialized to 2^16/3V*2.21V
*/
uint32_t VREFMeasured = 26433;

/* error callback, does nothing */
void adcerrorcallback(ADCDriver *adcp, adcerror_t err) {
(void)adcp;
(void)err;
}

/*
* ADC conversion group
* Mode : Linear buffer, 8 samples of 1 channel, SW triggered.
* Channels : ADC3_IN14 / PF4
*/
const ADCConversionGroup adcgrpcfg1 = {
FALSE, // circular buffer mode
ADC_GRP1_NUM_CHANNELS, // number of analog channels
NULL, // callback function (not nedded here)
adcerrorcallback, //error callback
0, // CR1
ADC_CR2_SWSTART | ADC_CR2_ALIGN, // CR2 Software start + Align results to left
ADC_SMPR1_SMP_AN14(ADC_SAMPLE_3), // sample times ch10-18
0, // sample times ch0-9,
ADC_SQR1_NUM_CH(ADC_GRP1_NUM_CHANNELS), // SQR1: conversion group sequence 13...16 + sequence length
0, // SQR2: conversion group sequence 7..12
ADC_SQR3_SQ1_N(ADC_CHANNEL_IN14) // SQR3: Conversion group sequence 1...6
};

void cmd_adc(BaseSequentialStream *chp, int argc, char *argv[]) {
(void)argv;
uint32_t sum=0;
unsigned int i;
if (argc > 0) {
chprintf(chp, "Usage: adc\r\n");
return;
}

adcConvert(&ADCD3, &adcgrpcfg1, samples_singlescan, ADC_GRP1_BUF_DEPTH);
// print the first measured value
chprintf(chp, "Measured: %d ", samples_singlescan[0]*16);
sum = 0;
for (i=0; i<ADC_GRP1_BUF_DEPTH; i++) {
// chprintf(chp, "%d ", samples_singlescan[i]);
sum += samples_singlescan[i];
}
// print the averaged value wih two digits precision
chprintf(chp, "%U\r\n", sum/(ADC_GRP1_BUF_DEPTH/16));
}

void cmd_adc_dbg(BaseSequentialStream *chp, int argc, char *argv[]) {
(void)argv;
uint32_t sum=0;
unsigned int i;
if (argc > 0) {
chprintf(chp, "Usage: adc\r\n");
return;
}

adcConvert(&ADCD3, &adcgrpcfg1, samples_singlescan, ADC_GRP1_BUF_DEPTH);
// print all measured value plus averaged
chprintf(chp, "Measured: %d ", samples_singlescan[0]*16);
sum = 0;
for (i=0; i<ADC_GRP1_BUF_DEPTH; i++) {
chprintf(chp, "%d ", samples_singlescan[i]);
sum += samples_singlescan[i];
chThdSleepMilliseconds(50);
}
// print the averaged value wih two digits precision
chprintf(chp, "%U\r\n", sum/(ADC_GRP1_BUF_DEPTH/16));
}

void cmd_adc_loop(BaseSequentialStream *chp, int argc, char *argv[]) {
(void)argv;
unsigned int i, ii;
uint32_t sum = 0;

if (argc > 0) {
chprintf(chp, "Usage: adc_loop\r\n");
return;
}
unsigned int loops = 500;

for (ii=0; ii<loops; ii++) {
sum = 0;
adcConvert(&ADCD3, &adcgrpcfg1, samples_singlescan, ADC_GRP1_BUF_DEPTH);
chprintf(chp, "[ADC][LOOP #%i] ", ii);
for (i=0; i<ADC_GRP1_BUF_DEPTH; i++) {
sum += samples_singlescan[i];
}
chprintf(chp, "%U %d\r\n", sum/(ADC_GRP1_BUF_DEPTH/16), (sum/(ADC_GRP1_BUF_DEPTH/16)/100));
chThdSleepMilliseconds(100);
}
}

void Init_ADC(void){
palSetPadMode(GPIOF, 4, PAL_MODE_INPUT_ANALOG);
adcStart(&ADCD3, NULL);
adcSTM32EnableTSVREFE();
}

+ 10
- 0
src/ADC.h View File

@@ -0,0 +1,10 @@
#ifndef ADC_H_INCLUDED
#define ADC_H_INCLUDED

void adcerrorcallback(ADCDriver *adcp, adcerror_t err);
void cmd_adc_loop(BaseSequentialStream *chp, int argc, char *argv[]);
void cmd_adc_dbg(BaseSequentialStream *chp, int argc, char *argv[]);
void cmd_adc(BaseSequentialStream *chp, int argc, char *argv[]);
void Init_ADC(void);

#endif // ADC_H_INCLUDED

+ 63
- 0
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@@ -0,0 +1,63 @@
#include <stdlib.h>
#include "ch.h"
#include "hal.h"
#include "chprintf.h"

#include "I2C.h"

const uint8_t ds1621_address = 0x48;

const float temperature_Scaling = 1.07; // calibration for more accurate temp voltage output

uint8_t setupDone = 0;

const I2CConfig i2cConfig = {
OPMODE_I2C,
100000,
STD_DUTY_CYCLE,
};

float getTemperature(BaseSequentialStream *chp) {
uint8_t result;
systime_t tmo = MS2ST(4);
uint8_t rxbuf[6];
i2cAcquireBus(&I2CD2);
}

void cmd_adc_i2c_temp(BaseSequentialStream *chp, int argc, char *argv[]) {
(void)argc;
(void)argv;

Init_DS1621();
float temp = getTemperature(chp);

}

void Init_DS1621(void) {
// Say hi !
// Send mode : 0xac then ONE_SHOT
if (setupDone == 1)
return;
systime_t tmo = MS2ST(4);
i2cAcquireBus(&I2CD2);

uint8_t txbuf[4] = "0xac";
msg_t status = i2cMasterTransmitTimeout(&I2CD2, ds1621_address, txbuf, 4, NULL, 0, tmo);

uint8_t txbuf_1[4] = "B00000001";
msg_t status2 = i2cMasterTransmitTimeout(&I2CD2, ds1621_address, txbuf_1, 6, NULL, 0, tmo);
i2cReleaseBus(&I2CD2);

setupDone = 1;
}

void Init_I2C(void) {
i2cStart(&I2CD2, &i2cConfig);
/*
* Init I2C on address 0x48
* Port GPIO F
* Pin 0 -> SDA
* Pin 1 -> SCL
*/
palSetGroupMode(GPIOF, 0, 1, PAL_MODE_ALTERNATE(4) | PAL_STM32_OTYPE_OPENDRAIN);
}

+ 9
- 0
src/I2C.h View File

@@ -0,0 +1,9 @@
#ifndef I2C_H_INCLUDED
#define I2C_H_INCLUDED

void Init_I2C(void);
void Init_DS1621(void);
float getTemperature(BaseSequentialStream *chp);
void cmd_i2c_temp(BaseSequentialStream *chp, int argc, char *argv[]);

#endif // I2C_H_INCLUDED

+ 531
- 0
src/chconf.h View File

@@ -0,0 +1,531 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio

Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/

/**
* @file templates/chconf.h
* @brief Configuration file template.
* @details A copy of this file must be placed in each project directory, it
* contains the application specific kernel settings.
*
* @addtogroup config
* @details Kernel related settings and hooks.
* @{
*/

#ifndef _CHCONF_H_
#define _CHCONF_H_

/*===========================================================================*/
/**
* @name Kernel parameters and options
* @{
*/
/*===========================================================================*/

/**
* @brief System tick frequency.
* @details Frequency of the system timer that drives the system ticks. This
* setting also defines the system tick time unit.
*/
#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
#define CH_FREQUENCY 1000
#endif

/**
* @brief Round robin interval.
* @details This constant is the number of system ticks allowed for the
* threads before preemption occurs. Setting this value to zero
* disables the preemption for threads with equal priority and the
* round robin becomes cooperative. Note that higher priority
* threads can still preempt, the kernel is always preemptive.
*
* @note Disabling the round robin preemption makes the kernel more compact
* and generally faster.
*/
#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
#define CH_TIME_QUANTUM 20
#endif

/**
* @brief Managed RAM size.
* @details Size of the RAM area to be managed by the OS. If set to zero
* then the whole available RAM is used. The core memory is made
* available to the heap allocator and/or can be used directly through
* the simplified core memory allocator.
*
* @note In order to let the OS manage the whole RAM the linker script must
* provide the @p __heap_base__ and @p __heap_end__ symbols.
* @note Requires @p CH_USE_MEMCORE.
*/
#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
#define CH_MEMCORE_SIZE 0
#endif

/**
* @brief Idle thread automatic spawn suppression.
* @details When this option is activated the function @p chSysInit()
* does not spawn the idle thread automatically. The application has
* then the responsibility to do one of the following:
* - Spawn a custom idle thread at priority @p IDLEPRIO.
* - Change the main() thread priority to @p IDLEPRIO then enter
* an endless loop. In this scenario the @p main() thread acts as
* the idle thread.
* .
* @note Unless an idle thread is spawned the @p main() thread must not
* enter a sleep state.
*/
#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__)
#define CH_NO_IDLE_THREAD FALSE
#endif

/** @} */

/*===========================================================================*/
/**
* @name Performance options
* @{
*/
/*===========================================================================*/

/**
* @brief OS optimization.
* @details If enabled then time efficient rather than space efficient code
* is used when two possible implementations exist.
*
* @note This is not related to the compiler optimization options.
* @note The default is @p TRUE.
*/
#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
#define CH_OPTIMIZE_SPEED TRUE
#endif

/** @} */

/*===========================================================================*/
/**
* @name Subsystem options
* @{
*/
/*===========================================================================*/

/**
* @brief Threads registry APIs.
* @details If enabled then the registry APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)
#define CH_USE_REGISTRY TRUE
#endif

/**
* @brief Threads synchronization APIs.
* @details If enabled then the @p chThdWait() function is included in
* the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
#define CH_USE_WAITEXIT TRUE
#endif

/**
* @brief Semaphores APIs.
* @details If enabled then the Semaphores APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
#define CH_USE_SEMAPHORES TRUE
#endif

/**
* @brief Semaphores queuing mode.
* @details If enabled then the threads are enqueued on semaphores by
* priority rather than in FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special requirements.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
#define CH_USE_SEMAPHORES_PRIORITY FALSE
#endif

/**
* @brief Atomic semaphore API.
* @details If enabled then the semaphores the @p chSemSignalWait() API
* is included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
#define CH_USE_SEMSW TRUE
#endif

/**
* @brief Mutexes APIs.
* @details If enabled then the mutexes APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
#define CH_USE_MUTEXES TRUE
#endif

/**
* @brief Conditional Variables APIs.
* @details If enabled then the conditional variables APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_MUTEXES.
*/
#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
#define CH_USE_CONDVARS TRUE
#endif

/**
* @brief Conditional Variables APIs with timeout.
* @details If enabled then the conditional variables APIs with timeout
* specification are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_CONDVARS.
*/
#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
#define CH_USE_CONDVARS_TIMEOUT TRUE
#endif

/**
* @brief Events Flags APIs.
* @details If enabled then the event flags APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
#define CH_USE_EVENTS TRUE
#endif

/**
* @brief Events Flags APIs with timeout.
* @details If enabled then the events APIs with timeout specification
* are included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_EVENTS.
*/
#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
#define CH_USE_EVENTS_TIMEOUT TRUE
#endif

/**
* @brief Synchronous Messages APIs.
* @details If enabled then the synchronous messages APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
#define CH_USE_MESSAGES TRUE
#endif

/**
* @brief Synchronous Messages queuing mode.
* @details If enabled then messages are served by priority rather than in
* FIFO order.
*
* @note The default is @p FALSE. Enable this if you have special requirements.
* @note Requires @p CH_USE_MESSAGES.
*/
#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
#define CH_USE_MESSAGES_PRIORITY FALSE
#endif

/**
* @brief Mailboxes APIs.
* @details If enabled then the asynchronous messages (mailboxes) APIs are
* included in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_SEMAPHORES.
*/
#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
#define CH_USE_MAILBOXES TRUE
#endif

/**
* @brief I/O Queues APIs.
* @details If enabled then the I/O queues APIs are included in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
#define CH_USE_QUEUES TRUE
#endif

/**
* @brief Core Memory Manager APIs.
* @details If enabled then the core memory manager APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)
#define CH_USE_MEMCORE TRUE
#endif

/**
* @brief Heap Allocator APIs.
* @details If enabled then the memory heap allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or
* @p CH_USE_SEMAPHORES.
* @note Mutexes are recommended.
*/
#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
#define CH_USE_HEAP TRUE
#endif

/**
* @brief C-runtime allocator.
* @details If enabled the the heap allocator APIs just wrap the C-runtime
* @p malloc() and @p free() functions.
*
* @note The default is @p FALSE.
* @note Requires @p CH_USE_HEAP.
* @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the
* appropriate documentation.
*/
#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
#define CH_USE_MALLOC_HEAP FALSE
#endif

/**
* @brief Memory Pools Allocator APIs.
* @details If enabled then the memory pools allocator APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
*/
#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
#define CH_USE_MEMPOOLS TRUE
#endif

/**
* @brief Dynamic Threads APIs.
* @details If enabled then the dynamic threads creation APIs are included
* in the kernel.
*
* @note The default is @p TRUE.
* @note Requires @p CH_USE_WAITEXIT.
* @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
*/
#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
#define CH_USE_DYNAMIC TRUE
#endif

/** @} */

/*===========================================================================*/
/**
* @name Debug options
* @{
*/
/*===========================================================================*/

/**
* @brief Debug option, system state check.
* @details If enabled the correct call protocol for system APIs is checked
* at runtime.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_SYSTEM_STATE_CHECK FALSE
#endif

/**
* @brief Debug option, parameters checks.
* @details If enabled then the checks on the API functions input
* parameters are activated.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_CHECKS FALSE
#endif

/**
* @brief Debug option, consistency checks.
* @details If enabled then all the assertions in the kernel code are
* activated. This includes consistency checks inside the kernel,
* runtime anomalies and port-defined checks.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_ASSERTS FALSE
#endif

/**
* @brief Debug option, trace buffer.
* @details If enabled then the context switch circular trace buffer is
* activated.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_TRACE FALSE
#endif

/**
* @brief Debug option, stack checks.
* @details If enabled then a runtime stack check is performed.
*
* @note The default is @p FALSE.
* @note The stack check is performed in a architecture/port dependent way.
* It may not be implemented or some ports.
* @note The default failure mode is to halt the system with the global
* @p panic_msg variable set to @p NULL.
*/
#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_STACK_CHECK FALSE
#endif

/**
* @brief Debug option, stacks initialization.
* @details If enabled then the threads working area is filled with a byte
* value when a thread is created. This can be useful for the
* runtime measurement of the used stack.
*
* @note The default is @p FALSE.
*/
#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
#define CH_DBG_FILL_THREADS FALSE
#endif

/**
* @brief Debug option, threads profiling.
* @details If enabled then a field is added to the @p Thread structure that
* counts the system ticks occurred while executing the thread.
*
* @note The default is @p TRUE.
* @note This debug option is defaulted to TRUE because it is required by
* some test cases into the test suite.
*/
#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
#define CH_DBG_THREADS_PROFILING TRUE
#endif

/** @} */

/*===========================================================================*/
/**
* @name Kernel hooks
* @{
*/
/*===========================================================================*/

/**
* @brief Threads descriptor structure extension.
* @details User fields added to the end of the @p Thread structure.
*/
#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
#define THREAD_EXT_FIELDS \
/* Add threads custom fields here.*/
#endif

/**
* @brief Threads initialization hook.
* @details User initialization code added to the @p chThdInit() API.
*
* @note It is invoked from within @p chThdInit() and implicitly from all
* the threads creation APIs.
*/
#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__)
#define THREAD_EXT_INIT_HOOK(tp) { \
/* Add threads initialization code here.*/ \
}
#endif

/**
* @brief Threads finalization hook.
* @details User finalization code added to the @p chThdExit() API.
*
* @note It is inserted into lock zone.
* @note It is also invoked when the threads simply return in order to
* terminate.
*/
#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__)
#define THREAD_EXT_EXIT_HOOK(tp) { \
/* Add threads finalization code here.*/ \
}
#endif

/**
* @brief Context switch hook.
* @details This hook is invoked just before switching between threads.
*/
#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__)
#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \
/* System halt code here.*/ \
}
#endif

/**
* @brief Idle Loop hook.
* @details This hook is continuously invoked by the idle thread loop.
*/
#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
#define IDLE_LOOP_HOOK() { \
/* Idle loop code here.*/ \
}
#endif

/**
* @brief System tick event hook.
* @details This hook is invoked in the system tick handler immediately
* after processing the virtual timers queue.
*/
#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__)
#define SYSTEM_TICK_EVENT_HOOK() { \
/* System tick event code here.*/ \
}
#endif

/**
* @brief System halt hook.
* @details This hook is invoked in case to a system halting error before
* the system is halted.
*/
#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
#define SYSTEM_HALT_HOOK() { \
/* System halt code here.*/ \
}
#endif

/** @} */

/*===========================================================================*/
/* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/

#endif /* _CHCONF_H_ */

/** @} */

+ 312
- 0
src/halconf.h View File

@@ -0,0 +1,312 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio

Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/

/**
* @file templates/halconf.h
* @brief HAL configuration header.
* @details HAL configuration file, this file allows to enable or disable the
* various device drivers from your application. You may also use
* this file in order to override the device drivers default settings.
*
* @addtogroup HAL_CONF
* @{
*/

#ifndef _HALCONF_H_
#define _HALCONF_H_

#include "mcuconf.h"

/**
* @brief Enables the TM subsystem.
*/
#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
#define HAL_USE_TM FALSE
#endif

/**
* @brief Enables the PAL subsystem.
*/
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
#define HAL_USE_PAL TRUE
#endif

/**
* @brief Enables the ADC subsystem.
*/
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
#define HAL_USE_ADC TRUE
#endif

/**
* @brief Enables the CAN subsystem.
*/
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
#define HAL_USE_CAN FALSE
#endif

/**
* @brief Enables the EXT subsystem.
*/
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
#define HAL_USE_EXT FALSE
#endif

/**
* @brief Enables the GPT subsystem.
*/
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
#define HAL_USE_GPT FALSE
#endif

/**
* @brief Enables the I2C subsystem.
*/
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
#define HAL_USE_I2C TRUE
#endif

/**
* @brief Enables the ICU subsystem.
*/
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
#define HAL_USE_ICU FALSE
#endif

/**
* @brief Enables the MAC subsystem.
*/
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
#define HAL_USE_MAC FALSE
#endif

/**
* @brief Enables the MMC_SPI subsystem.
*/
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
#define HAL_USE_MMC_SPI FALSE
#endif

/**
* @brief Enables the PWM subsystem.
*/
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
#define HAL_USE_PWM FALSE
#endif

/**
* @brief Enables the RTC subsystem.
*/
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
#define HAL_USE_RTC FALSE
#endif

/**
* @brief Enables the SDC subsystem.
*/
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
#define HAL_USE_SDC FALSE
#endif

/**
* @brief Enables the SERIAL subsystem.
*/
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL FALSE
#endif

/**
* @brief Enables the SERIAL over USB subsystem.
*/
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
#define HAL_USE_SERIAL_USB TRUE
#endif

/**
* @brief Enables the SPI subsystem.
*/
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
#define HAL_USE_SPI FALSE
#endif

/**
* @brief Enables the UART subsystem.
*/
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
#define HAL_USE_UART FALSE
#endif

/**
* @brief Enables the USB subsystem.
*/
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
#define HAL_USE_USB TRUE
#endif

/*===========================================================================*/
/* ADC driver related settings. */
/*===========================================================================*/

/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
#define ADC_USE_WAIT TRUE
#endif

/**
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define ADC_USE_MUTUAL_EXCLUSION TRUE
#endif

/*===========================================================================*/
/* CAN driver related settings. */
/*===========================================================================*/

/**
* @brief Sleep mode related APIs inclusion switch.
*/
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
#define CAN_USE_SLEEP_MODE TRUE
#endif

/*===========================================================================*/
/* I2C driver related settings. */
/*===========================================================================*/

/**
* @brief Enables the mutual exclusion APIs on the I2C bus.
*/
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define I2C_USE_MUTUAL_EXCLUSION TRUE
#endif

/*===========================================================================*/
/* MAC driver related settings. */
/*===========================================================================*/

/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
#define MAC_USE_ZERO_COPY FALSE
#endif

/**
* @brief Enables an event sources for incoming packets.
*/
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
#define MAC_USE_EVENTS TRUE
#endif

/*===========================================================================*/
/* MMC_SPI driver related settings. */
/*===========================================================================*/

/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
* This option is recommended also if the SPI driver does not
* use a DMA channel and heavily loads the CPU.
*/
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
#define MMC_NICE_WAITING TRUE
#endif

/*===========================================================================*/
/* SDC driver related settings. */
/*===========================================================================*/

/**
* @brief Number of initialization attempts before rejecting the card.
* @note Attempts are performed at 10mS intervals.
*/
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
#define SDC_INIT_RETRY 100
#endif

/**
* @brief Include support for MMC cards.
* @note MMC support is not yet implemented so this option must be kept
* at @p FALSE.
*/
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
#define SDC_MMC_SUPPORT FALSE
#endif

/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the MMC waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
*/
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
#define SDC_NICE_WAITING TRUE
#endif

/*===========================================================================*/
/* SERIAL driver related settings. */
/*===========================================================================*/

/**
* @brief Default bit rate.
* @details Configuration parameter, this is the baud rate selected for the
* default configuration.
*/
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
#define SERIAL_DEFAULT_BITRATE 38400
#endif

/**
* @brief Serial buffers size.
* @details Configuration parameter, you can change the depth of the queue
* buffers depending on the requirements of your application.
* @note The default is 64 bytes for both the transmission and receive
* buffers.
*/
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
#define SERIAL_BUFFERS_SIZE 16
#endif

/*===========================================================================*/
/* SPI driver related settings. */
/*===========================================================================*/

/**
* @brief Enables synchronous APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
#define SPI_USE_WAIT TRUE
#endif

/**
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
* @note Disabling this option saves both code and data space.
*/
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define SPI_USE_MUTUAL_EXCLUSION TRUE
#endif

#endif /* _HALCONF_H_ */

/** @} */

+ 191
- 0
src/main.c View File

@@ -0,0 +1,191 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio

Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/

#include "ch.h"
#include "hal.h"
#include "test.h"

#include "chprintf.h"
#include "shell.h"

#include "usbcfg.h"

#include "ADC.h"
#include "I2C.h"

/*
* Red LED blinker thread, times are in milliseconds.
*/
static WORKING_AREA(waThread1, 128);
static msg_t Thread1(void *arg) {

(void)arg;
chRegSetThreadName("blinker1");
while (TRUE) {
palClearPad(GPIOC, GPIOC_LED);
chThdSleepMilliseconds(500);
palSetPad(GPIOC, GPIOC_LED);
chThdSleepMilliseconds(500);
}
}

/*===========================================================================*/
/* Command line related. */
/*===========================================================================*/

/* Virtual serial port over USB.*/
SerialUSBDriver SDU1;

#define SHELL_WA_SIZE THD_WA_SIZE(2048)
#define TEST_WA_SIZE THD_WA_SIZE(256)

static void cmd_mem(BaseSequentialStream *chp, int argc, char *argv[]) {
size_t n, size;

(void)argv;
if (argc > 0) {
chprintf(chp, "Usage: mem\r\n");
return;
}
n = chHeapStatus(NULL, &size);
chprintf(chp, "core free memory : %u bytes\r\n", chCoreStatus());
chprintf(chp, "heap fragments : %u\r\n", n);
chprintf(chp, "heap free total : %u bytes\r\n", size);
}

static void cmd_threads(BaseSequentialStream *chp, int argc, char *argv[]) {
static const char *states[] = {THD_STATE_NAMES};
Thread *tp;

(void)argv;
if (argc > 0) {
chprintf(chp, "Usage: threads\r\n");
return;
}
chprintf(chp, " addr stack prio refs state time\r\n");
tp = chRegFirstThread();
do {
chprintf(chp, "%.8lx %.8lx %4lu %4lu %9s %lu\r\n",
(uint32_t)tp, (uint32_t)tp->p_ctx.r13,
(uint32_t)tp->p_prio, (uint32_t)(tp->p_refs - 1),
states[tp->p_state], (uint32_t)tp->p_time);
tp = chRegNextThread(tp);
} while (tp != NULL);
}

static void cmd_test(BaseSequentialStream *chp, int argc, char *argv[]) {
Thread *tp;

(void)argv;
if (argc > 0) {
chprintf(chp, "Usage: test\r\n");
return;
}
tp = chThdCreateFromHeap(NULL, TEST_WA_SIZE, chThdGetPriority(),
TestThread, chp);
if (tp == NULL) {
chprintf(chp, "out of memory\r\n");
return;
}
chThdWait(tp);
}

static const ShellCommand commands[] = {
{"mem", cmd_mem},
{"threads", cmd_threads},
{"test", cmd_test},
{"adc", cmd_adc},
{"adc_loop", cmd_adc_loop},
{"adc_dbg", cmd_adc_dbg},
{NULL, NULL}
};

static const ShellConfig shell_cfg1 = {
(BaseSequentialStream *)&SDU1,
commands
};

/*===========================================================================*/
/* Initialization and main thread. */
/*===========================================================================*/

/*
* Application entry point.
*/
int main(void) {
Thread *shelltp = NULL;

/*
* System initializations.
* - HAL initialization, this also initializes the configured device drivers
* and performs the board-specific initializations.
* - Kernel initialization, the main() function becomes a thread and the
* RTOS is active.
*/
halInit();
chSysInit();

/*
* Shell manager initialization.
*/
shellInit();

Init_ADC();
Init_I2C();

/*
* Initializes a serial-over-USB CDC driver.
*/
sduObjectInit(&SDU1);
sduStart(&SDU1, &serusbcfg);

/*
* Activates the USB driver and then the USB bus pull-up on D+.
* Note, a delay is inserted in order to not have to disconnect the cable
* after a reset.
*/
usbDisconnectBus(serusbcfg.usbp);
chThdSleepMilliseconds(1000);
usbStart(serusbcfg.usbp, &usbcfg);
usbConnectBus(serusbcfg.usbp);

/*
* Creating the blinker threads.
*/
chThdCreateStatic(waThread1, sizeof(waThread1),
NORMALPRIO + 10, Thread1, NULL);

/*
* Normal main() thread activity, in this demo it just performs
* a shell respawn upon its termination.
*/
while (TRUE) {
if (!shelltp) {
if (SDU1.config->usbp->state == USB_ACTIVE) {
/* Spawns a new shell.*/
shelltp = shellCreate(&shell_cfg1, SHELL_WA_SIZE, NORMALPRIO);
}
} else {
/* If the previous shell exited.*/
if (chThdTerminated(shelltp)) {
/* Recovers memory of the previous shell.*/
chThdRelease(shelltp);
shelltp = NULL;
}
}
chThdSleepMilliseconds(500);
}
}

+ 303
- 0
src/mcuconf.h View File

@@ -0,0 +1,303 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio

Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/

/*
* STM32F4xx drivers configuration.
* The following settings override the default settings present in
* the various device driver implementation headers.
* Note that the settings for each driver only have effect if the whole
* driver is enabled in halconf.h.
*
* IRQ priorities:
* 15...0 Lowest...Highest.
*
* DMA priorities:
* 0...3 Lowest...Highest.
*/

#define STM32F4xx_MCUCONF

/*
* HAL driver system settings.
*/
#define STM32_NO_INIT FALSE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
#define STM32_LSE_ENABLED FALSE
#define STM32_CLOCK48_REQUIRED TRUE
#define STM32_SW STM32_SW_PLL
#define STM32_PLLSRC STM32_PLLSRC_HSE
#define STM32_PLLM_VALUE 12
#define STM32_PLLN_VALUE 336
#define STM32_PLLP_VALUE 2
#define STM32_PLLQ_VALUE 7
#define STM32_HPRE STM32_HPRE_DIV1
#define STM32_PPRE1 STM32_PPRE1_DIV4
#define STM32_PPRE2 STM32_PPRE2_DIV2
#define STM32_RTCSEL STM32_RTCSEL_LSI
#define STM32_RTCPRE_VALUE 8
#define STM32_MCO1SEL STM32_MCO1SEL_HSI
#define STM32_MCO1PRE STM32_MCO1PRE_DIV1
#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK
#define STM32_MCO2PRE STM32_MCO2PRE_DIV5
#define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE

/*
* ADC driver system settings.
*/
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
#define STM32_ADC_USE_ADC1 FALSE
#define STM32_ADC_USE_ADC2 FALSE
#define STM32_ADC_USE_ADC3 TRUE
#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
#define STM32_ADC_ADC1_DMA_PRIORITY 2
#define STM32_ADC_ADC2_DMA_PRIORITY 2
#define STM32_ADC_ADC3_DMA_PRIORITY 2
#define STM32_ADC_IRQ_PRIORITY 6
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6
#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 6
#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 6

/*
* CAN driver system settings.
*/
#define STM32_CAN_USE_CAN1 FALSE
#define STM32_CAN_USE_CAN2 FALSE
#define STM32_CAN_CAN1_IRQ_PRIORITY 11
#define STM32_CAN_CAN2_IRQ_PRIORITY 11

/*
* EXT driver system settings.
*/
#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
#define STM32_EXT_EXTI17_IRQ_PRIORITY 15
#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
#define STM32_EXT_EXTI20_IRQ_PRIORITY 6
#define STM32_EXT_EXTI21_IRQ_PRIORITY 15
#define STM32_EXT_EXTI22_IRQ_PRIORITY 15

/*
* GPT driver system settings.
*/
#define STM32_GPT_USE_TIM1 FALSE
#define STM32_GPT_USE_TIM2 FALSE
#define STM32_GPT_USE_TIM3 FALSE
#define STM32_GPT_USE_TIM4 FALSE
#define STM32_GPT_USE_TIM5 FALSE
#define STM32_GPT_USE_TIM6 FALSE
#define STM32_GPT_USE_TIM7 FALSE
#define STM32_GPT_USE_TIM8 FALSE
#define STM32_GPT_USE_TIM9 FALSE
#define STM32_GPT_USE_TIM11 FALSE
#define STM32_GPT_USE_TIM12 FALSE
#define STM32_GPT_USE_TIM14 FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
#define STM32_GPT_TIM4_IRQ_PRIORITY 7
#define STM32_GPT_TIM5_IRQ_PRIORITY 7
#define STM32_GPT_TIM6_IRQ_PRIORITY 7
#define STM32_GPT_TIM7_IRQ_PRIORITY 7
#define STM32_GPT_TIM8_IRQ_PRIORITY 7
#define STM32_GPT_TIM9_IRQ_PRIORITY 7
#define STM32_GPT_TIM11_IRQ_PRIORITY 7
#define STM32_GPT_TIM12_IRQ_PRIORITY 7
#define STM32_GPT_TIM14_IRQ_PRIORITY 7

/*
* I2C driver system settings.
*/
#define STM32_I2C_USE_I2C1 FALSE
#define STM32_I2C_USE_I2C2 TRUE
#define STM32_I2C_USE_I2C3 FALSE
#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_I2C_I2C1_IRQ_PRIORITY 5
#define STM32_I2C_I2C2_IRQ_PRIORITY 5
#define STM32_I2C_I2C3_IRQ_PRIORITY 5
#define STM32_I2C_I2C1_DMA_PRIORITY 3
#define STM32_I2C_I2C2_DMA_PRIORITY 3
#define STM32_I2C_I2C3_DMA_PRIORITY 3
#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt()
#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt()
#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt()

/*
* ICU driver system settings.
*/
#define STM32_ICU_USE_TIM1 FALSE
#define STM32_ICU_USE_TIM2 FALSE
#define STM32_ICU_USE_TIM3 FALSE
#define STM32_ICU_USE_TIM4 FALSE
#define STM32_ICU_USE_TIM5 FALSE
#define STM32_ICU_USE_TIM8 FALSE
#define STM32_ICU_USE_TIM9 FALSE
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
#define STM32_ICU_TIM5_IRQ_PRIORITY 7
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
#define STM32_ICU_TIM9_IRQ_PRIORITY 7

/*
* MAC driver system settings.
*/
#define STM32_MAC_TRANSMIT_BUFFERS 2
#define STM32_MAC_RECEIVE_BUFFERS 4
#define STM32_MAC_BUFFERS_SIZE 1522
#define STM32_MAC_PHY_TIMEOUT 100
#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE
#define STM32_MAC_ETH1_IRQ_PRIORITY 13
#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0

/*
* PWM driver system settings.
*/
#define STM32_PWM_USE_ADVANCED FALSE
#define STM32_PWM_USE_TIM1 FALSE
#define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE
#define STM32_PWM_USE_TIM4 FALSE
#define STM32_PWM_USE_TIM5 FALSE
#define STM32_PWM_USE_TIM8 FALSE
#define STM32_PWM_USE_TIM9 FALSE
#define STM32_PWM_TIM1_IRQ_PRIORITY 7
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
#define STM32_PWM_TIM8_IRQ_PRIORITY 7
#define STM32_PWM_TIM9_IRQ_PRIORITY 7

/*
* SERIAL driver system settings.
*/
#define STM32_SERIAL_USE_USART1 FALSE
#define STM32_SERIAL_USE_USART2 FALSE
#define STM32_SERIAL_USE_USART3 FALSE
#define STM32_SERIAL_USE_UART4 FALSE
#define STM32_SERIAL_USE_UART5 FALSE
#define STM32_SERIAL_USE_USART6 FALSE
#define STM32_SERIAL_USART1_PRIORITY 12
#define STM32_SERIAL_USART2_PRIORITY 12
#define STM32_SERIAL_USART3_PRIORITY 12
#define STM32_SERIAL_UART4_PRIORITY 12
#define STM32_SERIAL_UART5_PRIORITY 12
#define STM32_SERIAL_USART6_PRIORITY 12

/*
* SPI driver system settings.
*/
#define STM32_SPI_USE_SPI1 FALSE
#define STM32_SPI_USE_SPI2 FALSE
#define STM32_SPI_USE_SPI3 FALSE
#define STM32_SPI_USE_SPI4 FALSE
#define STM32_SPI_USE_SPI5 FALSE
#define STM32_SPI_USE_SPI6 FALSE
#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
#define STM32_SPI_SPI4_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
#define STM32_SPI_SPI4_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
#define STM32_SPI_SPI5_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
#define STM32_SPI_SPI5_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
#define STM32_SPI_SPI6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
#define STM32_SPI_SPI6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
#define STM32_SPI_SPI1_DMA_PRIORITY 1
#define STM32_SPI_SPI2_DMA_PRIORITY 1
#define STM32_SPI_SPI3_DMA_PRIORITY 1
#define STM32_SPI_SPI4_DMA_PRIORITY 1
#define STM32_SPI_SPI5_DMA_PRIORITY 1
#define STM32_SPI_SPI6_DMA_PRIORITY 1
#define STM32_SPI_SPI1_IRQ_PRIORITY 10
#define STM32_SPI_SPI2_IRQ_PRIORITY 10
#define STM32_SPI_SPI3_IRQ_PRIORITY 10
#define STM32_SPI_SPI4_IRQ_PRIORITY 10
#define STM32_SPI_SPI5_IRQ_PRIORITY 10
#define STM32_SPI_SPI6_IRQ_PRIORITY 10
#define STM32_SPI_DMA_ERROR_HOOK(spip) chSysHalt()

/*
* UART driver system settings.
*/
#define STM32_UART_USE_USART1 FALSE
#define STM32_UART_USE_USART2 FALSE
#define STM32_UART_USE_USART3 FALSE
#define STM32_UART_USE_UART4 FALSE
#define STM32_UART_USE_UART5 FALSE
#define STM32_UART_USE_USART6 FALSE
#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_UART_USART1_IRQ_PRIORITY 12
#define STM32_UART_USART2_IRQ_PRIORITY 12
#define STM32_UART_USART3_IRQ_PRIORITY 12
#define STM32_UART_UART4_IRQ_PRIORITY 12
#define STM32_UART_UART5_IRQ_PRIORITY 12
#define STM32_UART_USART6_IRQ_PRIORITY 12
#define STM32_UART_USART1_DMA_PRIORITY 0
#define STM32_UART_USART2_DMA_PRIORITY 0
#define STM32_UART_USART3_DMA_PRIORITY 0
#define STM32_UART_UART4_DMA_PRIORITY 0
#define STM32_UART_UART5_DMA_PRIORITY 0
#define STM32_UART_USART6_DMA_PRIORITY 0
#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt()

/*
* USB driver system settings.
*/
#define STM32_USB_USE_OTG1 FALSE
#define STM32_USB_USE_OTG2 TRUE
#define STM32_USB_OTG1_IRQ_PRIORITY 14
#define STM32_USB_OTG2_IRQ_PRIORITY 14
#define STM32_USB_OTG1_RX_FIFO_SIZE 512
#define STM32_USB_OTG2_RX_FIFO_SIZE 1024
#define STM32_USB_OTG_THREAD_PRIO LOWPRIO
#define STM32_USB_OTG_THREAD_STACK_SIZE 128
#define STM32_USB_OTGFIFO_FILL_BASEPRI 0

+ 11
- 0
src/readme.txt View File

@@ -0,0 +1,11 @@
You have to set the correct memory layout for your device in the linker script.
Please check the FLASH and SRAM length.

e.g.


MEMORY
{
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 0x08000 /* 32k */
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x01000 /* 4k */
}

+ 314
- 0
src/usbcfg.c View File

@@ -0,0 +1,314 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio

Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at

http://www.apache.org/licenses/LICENSE-2.0

Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/

#include "ch.h"
#include "hal.h"

/*
* Endpoints to be used for USBD2.
*/
#define USBD2_DATA_REQUEST_EP 1
#define USBD2_DATA_AVAILABLE_EP 1
#define USBD2_INTERRUPT_REQUEST_EP 2

/*
* USB Device Descriptor.
*/
static const uint8_t vcom_device_descriptor_data[18] = {
USB_DESC_DEVICE (0x0110, /* bcdUSB (1.1). */
0x02, /* bDeviceClass (CDC). */
0x00, /* bDeviceSubClass. */
0x00, /* bDeviceProtocol. */
0x40, /* bMaxPacketSize. */
0x0483, /* idVendor (ST). */
0x5740, /* idProduct. */
0x0200, /* bcdDevice. */
1, /* iManufacturer. */
2, /* iProduct. */
3, /* iSerialNumber. */
1) /* bNumConfigurations. */
};

/*
* Device Descriptor wrapper.
*/
static const USBDescriptor vcom_device_descriptor = {
sizeof vcom_device_descriptor_data,
vcom_device_descriptor_data
};

/* Configuration Descriptor tree for a CDC.*/
static const uint8_t vcom_configuration_descriptor_data[67] = {
/* Configuration Descriptor.*/
USB_DESC_CONFIGURATION(67, /* wTotalLength. */
0x02, /* bNumInterfaces. */
0x01, /* bConfigurationValue. */
0, /* iConfiguration. */
0xC0, /* bmAttributes (self powered). */
50), /* bMaxPower (100mA). */
/* Interface Descriptor.*/
USB_DESC_INTERFACE (0x00, /* bInterfaceNumber. */
0x00, /* bAlternateSetting. */
0x01, /* bNumEndpoints. */
0x02, /* bInterfaceClass (Communications
Interface Class, CDC section
4.2). */
0x02, /* bInterfaceSubClass (Abstract
Control Model, CDC section 4.3). */
0x01, /* bInterfaceProtocol (AT commands,
CDC section 4.4). */
0), /* iInterface. */
/* Header Functional Descriptor (CDC section 5.2.3).*/
USB_DESC_BYTE (5), /* bLength. */
USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */
USB_DESC_BYTE (0x00), /* bDescriptorSubtype (Header
Functional Descriptor. */
USB_DESC_BCD (0x0110), /* bcdCDC. */
/* Call Management Functional Descriptor. */
USB_DESC_BYTE (5), /* bFunctionLength. */
USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */
USB_DESC_BYTE (0x01), /* bDescriptorSubtype (Call Management
Functional Descriptor). */
USB_DESC_BYTE (0x00), /* bmCapabilities (D0+D1). */
USB_DESC_BYTE (0x01), /* bDataInterface. */
/* ACM Functional Descriptor.*/
USB_DESC_BYTE (4), /* bFunctionLength. */
USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */
USB_DESC_BYTE (0x02), /* bDescriptorSubtype (Abstract
Control Management Descriptor). */
USB_DESC_BYTE (0x02), /* bmCapabilities. */
/* Union Functional Descriptor.*/
USB_DESC_BYTE (5), /* bFunctionLength. */
USB_DESC_BYTE (0x24), /* bDescriptorType (CS_INTERFACE). */
USB_DESC_BYTE (0x06), /* bDescriptorSubtype (Union
Functional Descriptor). */
USB_DESC_BYTE (0x00), /* bMasterInterface (Communication
Class Interface). */
USB_DESC_BYTE (0x01), /* bSlaveInterface0 (Data Class
Interface). */
/* Endpoint 2 Descriptor.*/
USB_DESC_ENDPOINT (USBD2_INTERRUPT_REQUEST_EP|0x80,
0x03, /* bmAttributes (Interrupt). */
0x0008, /* wMaxPacketSize. */
0xFF), /* bInterval. */
/* Interface Descriptor.*/
USB_DESC_INTERFACE (0x01, /* bInterfaceNumber. */
0x00, /* bAlternateSetting. */
0x02, /* bNumEndpoints. */
0x0A, /* bInterfaceClass (Data Class
Interface, CDC section 4.5). */
0x00, /* bInterfaceSubClass (CDC section
4.6). */
0x00, /* bInterfaceProtocol (CDC section
4.7). */
0x00), /* iInterface. */
/* Endpoint 3 Descriptor.*/
USB_DESC_ENDPOINT (USBD2_DATA_AVAILABLE_EP, /* bEndpointAddress.*/
0x02, /* bmAttributes (Bulk). */
0x0040, /* wMaxPacketSize. */
0x00), /* bInterval. */
/* Endpoint 1 Descriptor.*/
USB_DESC_ENDPOINT (USBD2_DATA_REQUEST_EP|0x80, /* bEndpointAddress.*/
0x02, /* bmAttributes (Bulk). */
0x0040, /* wMaxPacketSize. */
0x00) /* bInterval. */
};

/*
* Configuration Descriptor wrapper.
*/
static const USBDescriptor vcom_configuration_descriptor = {
sizeof vcom_configuration_descriptor_data,
vcom_configuration_descriptor_data
};

/*
* U.S. English language identifier.
*/
static const uint8_t vcom_string0[] = {
USB_DESC_BYTE(4), /* bLength. */
USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */
USB_DESC_WORD(0x0409) /* wLANGID (U.S. English). */
};

/*
* Vendor string.
*/
static const uint8_t vcom_string1[] = {
USB_DESC_BYTE(38), /* bLength. */
USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */
'S', 0, 'T', 0, 'M', 0, 'i', 0, 'c', 0, 'r', 0, 'o', 0, 'e', 0,
'l', 0, 'e', 0, 'c', 0, 't', 0, 'r', 0, 'o', 0, 'n', 0, 'i', 0,
'c', 0, 's', 0
};

/*
* Device Description string.
*/
static const uint8_t vcom_string2[] = {
USB_DESC_BYTE(56), /* bLength. */
USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */
'C', 0, 'h', 0, 'i', 0, 'b', 0, 'i', 0, 'O', 0, 'S', 0, '/', 0,
'R', 0, 'T', 0, ' ', 0, 'V', 0, 'i', 0, 'r', 0, 't', 0, 'u', 0,
'a', 0, 'l', 0, ' ', 0, 'C', 0, 'O', 0, 'M', 0, ' ', 0, 'P', 0,
'o', 0, 'r', 0, 't', 0
};

/*
* Serial Number string.
*/
static const uint8_t vcom_string3[] = {
USB_DESC_BYTE(8), /* bLength. */
USB_DESC_BYTE(USB_DESCRIPTOR_STRING), /* bDescriptorType. */
'0' + CH_KERNEL_MAJOR, 0,
'0' + CH_KERNEL_MINOR, 0,
'0' + CH_KERNEL_PATCH, 0
};

/*