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4072 schematics

main
squeaky otter 8 months ago
parent
commit
4f6219c748
  1. 291
      4072 VCF/4072 VCF-cache.lib
  2. 1
      4072 VCF/4072 VCF.kicad_pcb
  3. 43
      4072 VCF/4072 VCF.pro
  4. 1827
      4072 VCF/4072 VCF.sch
  5. 3
      4072 VCF/sym-lib-table
  6. 6
      ARP 2600.dcm
  7. 35
      ARP 2600.lib
  8. BIN
      schematics/4072 VCF.pdf

291
4072 VCF/4072 VCF-cache.lib

@ -0,0 +1,291 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# ARP_2600_LM3900
#
DEF ARP_2600_LM3900 U 0 20 Y Y 5 L N
F0 "U" 0 200 50 H V L CNN
F1 "ARP_2600_LM3900" 0 -200 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
SOIC*3.9x8.7mm*P1.27mm*
DIP*W7.62mm*
TSSOP*4.4x5mm*P0.65mm*
SSOP*5.3x6.2mm*P0.65mm*
$ENDFPLIST
DRAW
P 4 1 1 10 -200 200 200 0 -200 -200 -200 200 f
P 4 2 1 10 -200 200 200 0 -200 -200 -200 200 f
P 4 3 1 10 -200 200 200 0 -200 -200 -200 200 f
P 4 4 1 10 -200 200 200 0 -200 -200 -200 200 f
X + 1 -300 100 100 R 50 50 1 1 I
X ~ 5 300 0 100 L 50 50 1 1 O
X - 6 -300 -100 100 R 50 50 1 1 I
X + 2 -300 100 100 R 50 50 2 1 I
X - 3 -300 -100 100 R 50 50 2 1 I
X ~ 4 300 0 100 L 50 50 2 1 O
X + 13 -300 100 100 R 50 50 3 1 I
X - 8 -300 -100 100 R 50 50 3 1 I
X ~ 9 300 0 100 L 50 50 3 1 O
X ~ 10 300 0 100 L 50 50 4 1 O
X - 11 -300 -100 100 R 50 50 4 1 I
X + 12 -300 100 100 R 50 50 4 1 I
X V+ 14 -100 300 150 D 50 50 5 1 W
X V- 7 -100 -300 150 U 50 50 5 1 W
ENDDRAW
ENDDEF
#
# Amplifier_Operational_LM2904
#
DEF Amplifier_Operational_LM2904 U 0 5 Y Y 3 L N
F0 "U" 0 200 50 H V L CNN
F1 "Amplifier_Operational_LM2904" 0 -200 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS LM358 AD8620 LMC6062 LMC6082 TL062 TL072 TL082 NE5532 SA5532 RC4558 RC4560 RC4580 LMV358 TS912 TSV912IDT TSV912IST TLC272 TLC277 MCP602 OPA1678 OPA2134 OPA2340 OPA2376xxD OPA2376xxDGK MC33078 MC33178 LM4562 OP249 OP275 ADA4075-2 MCP6002-xP MCP6002-xSN MCP6002-xMS LM7332 OPA2333xxD OPA2333xxDGK LMC6482 LT1492 LTC6081xMS8 LM6172 MCP6L92 NJM2043 NJM2114 NJM4556A NJM4558 NJM4559 NJM4560 NJM4580 NJM5532 ADA4807-2ARM OPA2691 LT6234 OPA2356xxD OPA2356xxDGK OPA1612AxD MC33172 OPA1602 TLV2372 LT6237 OPA2277 MCP6022 MCP6V67EMS
$FPLIST
SOIC*3.9x4.9mm*P1.27mm*
DIP*W7.62mm*
TO*99*
OnSemi*Micro8*
TSSOP*3x3mm*P0.65mm*
TSSOP*4.4x3mm*P0.65mm*
MSOP*3x3mm*P0.65mm*
SSOP*3.9x4.9mm*P0.635mm*
LFCSP*2x2mm*P0.5mm*
*SIP*
SOIC*5.3x6.2mm*P1.27mm*
$ENDFPLIST
DRAW
P 4 1 1 10 -200 200 200 0 -200 -200 -200 200 f
P 4 2 1 10 -200 200 200 0 -200 -200 -200 200 f
X ~ 1 300 0 100 L 50 50 1 1 O
X - 2 -300 -100 100 R 50 50 1 1 I
X + 3 -300 100 100 R 50 50 1 1 I
X + 5 -300 100 100 R 50 50 2 1 I
X - 6 -300 -100 100 R 50 50 2 1 I
X ~ 7 300 0 100 L 50 50 2 1 O
X V- 4 -100 -300 150 U 50 50 3 1 W
X V+ 8 -100 300 150 D 50 50 3 1 W
ENDDRAW
ENDDEF
#
# Connector_Generic_Conn_01x01
#
DEF Connector_Generic_Conn_01x01 J 0 40 Y N 1 F N
F0 "J" 0 100 50 H V C CNN
F1 "Connector_Generic_Conn_01x01" 0 -100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Connector*:*_1x??_*
$ENDFPLIST
DRAW
S -50 5 0 -5 1 1 6 N
S -50 50 50 -50 1 1 10 f
X Pin_1 1 -200 0 150 R 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_C
#
DEF Device_C C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "Device_C" 25 -100 50 H V L CNN
F2 "" 38 -150 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
C_*
$ENDFPLIST
DRAW
P 2 0 1 20 -80 -30 80 -30 N
P 2 0 1 20 -80 30 80 30 N
X ~ 1 0 150 110 D 50 50 1 1 P
X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_CP
#
DEF Device_CP C 0 10 N Y 1 F N
F0 "C" 25 100 50 H V L CNN
F1 "Device_CP" 25 -100 50 H V L CNN
F2 "" 38 -150 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
CP_*
$ENDFPLIST
DRAW
S -90 20 90 40 0 1 0 N
S 90 -20 -90 -40 0 1 0 F
P 2 0 1 0 -70 90 -30 90 N
P 2 0 1 0 -50 110 -50 70 N
X ~ 1 0 150 110 D 50 50 1 1 P
X ~ 2 0 -150 110 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_Q_PNP_EBC
#
DEF Device_Q_PNP_EBC Q 0 0 Y N 1 F N
F0 "Q" 200 50 50 H V L CNN
F1 "Device_Q_PNP_EBC" 200 -50 50 H V L CNN
F2 "" 200 100 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
C 50 0 111 0 1 10 N
P 2 0 1 0 25 25 100 100 N
P 3 0 1 0 25 -25 100 -100 100 -100 N
P 3 0 1 20 25 75 25 -75 25 -75 N
P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
X E 1 100 -200 100 U 50 50 1 1 P
X B 2 -200 0 225 R 50 50 1 1 I
X C 3 100 200 100 D 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_R
#
DEF Device_R R 0 0 N Y 1 F N
F0 "R" 80 0 50 V V C CNN
F1 "Device_R" 0 0 50 V V C CNN
F2 "" -70 0 50 V I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
R_*
$ENDFPLIST
DRAW
S -40 -100 40 100 0 1 10 N
X ~ 1 0 150 50 D 50 50 1 1 P
X ~ 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_R_POT_TRIM
#
DEF Device_R_POT_TRIM RV 0 40 Y N 1 F N
F0 "RV" -175 0 50 V V C CNN
F1 "Device_R_POT_TRIM" -100 0 50 V V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Potentiometer*
$ENDFPLIST
DRAW
S 40 100 -40 -100 0 1 10 N
P 2 0 1 0 60 30 60 -30 N
P 2 0 1 0 100 0 60 0 N
X 1 1 0 150 50 D 50 50 1 1 P
X 2 2 150 0 50 L 50 50 1 1 P
X 3 3 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Diode_1N4148
#
DEF Diode_1N4148 D 0 40 N N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "Diode_1N4148" 0 -100 50 H V C CNN
F2 "Diode_THT:D_DO-35_SOD27_P7.62mm_Horizontal" 0 -175 50 H I C CNN
F3 "" 0 0 50 H I C CNN
ALIAS 1N4448 1N4149 1N4151 1N914 BA243 BA244 BA282 BA283 BAV17 BAV18 BAV19 BAV20 BAV21 BAW75 BAW76 BAY93
$FPLIST
D*DO?35*
$ENDFPLIST
DRAW
P 2 0 1 10 -50 50 -50 -50 N
P 2 0 1 0 50 0 -50 0 N
P 4 0 1 10 50 50 50 -50 -50 0 50 50 N
X K 1 -150 0 100 R 50 50 1 1 P
X A 2 150 0 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Transistor_BJT_2N3904
#
DEF Transistor_BJT_2N3904 Q 0 0 Y N 1 F N
F0 "Q" 200 75 50 H V L CNN
F1 "Transistor_BJT_2N3904" 200 0 50 H V L CNN
F2 "Package_TO_SOT_THT:TO-92_Inline" 200 -75 50 H I L CIN
F3 "" 0 0 50 H I L CNN
$FPLIST
TO?92*
$ENDFPLIST
DRAW
C 50 0 111 0 1 10 N
P 2 0 1 0 25 25 100 100 N
P 3 0 1 0 25 -25 100 -100 100 -100 N
P 3 0 1 20 25 75 25 -75 25 -75 N
P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
X E 1 100 -200 100 U 50 50 1 1 P
X B 2 -200 0 225 R 50 50 1 1 P
X C 3 100 200 100 D 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Transistor_BJT_2N3906
#
DEF Transistor_BJT_2N3906 Q 0 0 Y N 1 F N
F0 "Q" 200 75 50 H V L CNN
F1 "Transistor_BJT_2N3906" 200 0 50 H V L CNN
F2 "Package_TO_SOT_THT:TO-92_Inline" 200 -75 50 H I L CIN
F3 "" 0 0 50 H I L CNN
ALIAS 2N3905
$FPLIST
TO?92*
$ENDFPLIST
DRAW
C 50 0 111 0 1 10 N
P 2 0 1 0 25 25 100 100 N
P 3 0 1 0 25 -25 100 -100 100 -100 N
P 3 0 1 20 25 75 25 -75 25 -75 N
P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
X E 1 100 -200 100 U 50 50 1 1 P
X B 2 -200 0 225 R 50 50 1 1 I
X C 3 100 200 100 D 50 50 1 1 P
ENDDRAW
ENDDEF
#
# power_+15V
#
DEF power_+15V #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -150 50 H I C CNN
F1 "power_+15V" 0 140 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 2 0 1 0 -30 50 0 100 N
P 2 0 1 0 0 0 0 100 N
P 2 0 1 0 0 100 30 50 N
X +15V 1 0 0 0 U 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_GND
#
DEF power_GND #PWR 0 0 Y Y 1 F P
F0 "#PWR" 0 -250 50 H I C CNN
F1 "power_GND" 0 -150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
X GND 1 0 0 0 D 50 50 1 1 W N
ENDDRAW
ENDDEF
#
# power_PWR_FLAG
#
DEF power_PWR_FLAG #FLG 0 0 N N 1 F P
F0 "#FLG" 0 75 50 H I C CNN
F1 "power_PWR_FLAG" 0 150 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
DRAW
P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N
X pwr 1 0 0 0 U 50 50 0 0 w
ENDDRAW
ENDDEF
#
#End Library

1
4072 VCF/4072 VCF.kicad_pcb

@ -0,0 +1 @@
(kicad_pcb (version 4) (host kicad "dummy file") )

43
4072 VCF/4072 VCF.pro

@ -0,0 +1,43 @@
update=24/01/2021 13:49:40
version=1
last_client=kicad
[general]
version=1
RootSch=
BoardNm=
[pcbnew]
version=1
LastNetListRead=
UseCmpFile=1
PadDrill=0.600000000000
PadDrillOvalY=0.600000000000
PadSizeH=1.500000000000
PadSizeV=1.500000000000
PcbTextSizeV=1.500000000000
PcbTextSizeH=1.500000000000
PcbTextThickness=0.300000000000
ModuleTextSizeV=1.000000000000
ModuleTextSizeH=1.000000000000
ModuleTextSizeThickness=0.150000000000
SolderMaskClearance=0.000000000000
SolderMaskMinWidth=0.000000000000
DrawSegmentWidth=0.200000000000
BoardOutlineThickness=0.100000000000
ModuleOutlineThickness=0.150000000000
[cvpcb]
version=1
NetIExt=net
[eeschema]
version=1
LibDir=
[eeschema/libraries]
[schematic_editor]
version=1
PageLayoutDescrFile=
PlotDirectoryName=../schematics/
SubpartIdSeparator=0
SubpartFirstId=65
NetFmtName=
SpiceAjustPassiveValues=0
LabSize=79
ERC_TestSimilarLabels=1

1827
4072 VCF/4072 VCF.sch
File diff suppressed because it is too large
View File

3
4072 VCF/sym-lib-table

@ -0,0 +1,3 @@
(sym_lib_table
(lib (name ARP_2600)(type Legacy)(uri "${KIPRJMOD}/../ARP 2600.lib")(options "")(descr ""))
)

6
ARP 2600.dcm

@ -1,3 +1,9 @@
EESchema-DOCLIB Version 2.0
#
$CMP LM3900
D Quad operational amplifier
K quad opamp
F ~
$ENDCMP
#
#End Doc Library

35
ARP 2600.lib

@ -52,4 +52,39 @@ X C 14 -50 -300 100 D 50 50 4 1 P
ENDDRAW
ENDDEF
#
# LM3900
#
DEF LM3900 U 0 20 Y Y 5 L N
F0 "U" 0 200 50 H V L CNN
F1 "LM3900" 0 -200 50 H V L CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
SOIC*3.9x8.7mm*P1.27mm*
DIP*W7.62mm*
TSSOP*4.4x5mm*P0.65mm*
SSOP*5.3x6.2mm*P0.65mm*
$ENDFPLIST
DRAW
P 4 1 1 10 -200 200 200 0 -200 -200 -200 200 f
P 4 2 1 10 -200 200 200 0 -200 -200 -200 200 f
P 4 3 1 10 -200 200 200 0 -200 -200 -200 200 f
P 4 4 1 10 -200 200 200 0 -200 -200 -200 200 f
X + 1 -300 100 100 R 50 50 1 1 I
X ~ 5 300 0 100 L 50 50 1 1 O
X - 6 -300 -100 100 R 50 50 1 1 I
X + 2 -300 100 100 R 50 50 2 1 I
X - 3 -300 -100 100 R 50 50 2 1 I
X ~ 4 300 0 100 L 50 50 2 1 O
X + 13 -300 100 100 R 50 50 3 1 I
X - 8 -300 -100 100 R 50 50 3 1 I
X ~ 9 300 0 100 L 50 50 3 1 O
X ~ 10 300 0 100 L 50 50 4 1 O
X - 11 -300 -100 100 R 50 50 4 1 I
X + 12 -300 100 100 R 50 50 4 1 I
X V+ 14 -100 300 150 D 50 50 5 1 W
X V- 7 -100 -300 150 U 50 50 5 1 W
ENDDRAW
ENDDEF
#
#End Library

BIN
schematics/4072 VCF.pdf

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