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Jackalope-Glue Logic.sch 25KB

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  1. EESchema Schematic File Version 4
  2. LIBS:Jackalope-cache
  3. EELAYER 26 0
  4. EELAYER END
  5. $Descr C 22000 17000
  6. encoding utf-8
  7. Sheet 3 6
  8. Title ""
  9. Date ""
  10. Rev ""
  11. Comp ""
  12. Comment1 ""
  13. Comment2 ""
  14. Comment3 ""
  15. Comment4 ""
  16. $EndDescr
  17. Wire Wire Line
  18. 11250 11600 11600 11600
  19. Text GLabel 9800 14700 0 60 Input ~ 0
  20. DTACK_NET
  21. Wire Wire Line
  22. 11250 13600 11600 13600
  23. Text GLabel 11600 12600 2 60 Input ~ 0
  24. *DTACK_SER
  25. Wire Wire Line
  26. 11250 14600 11600 14600
  27. Text GLabel 11600 14500 2 60 Input ~ 0
  28. *DTACK_PAR
  29. Wire Wire Line
  30. 11250 12500 11600 12500
  31. Text GLabel 11600 13500 2 60 Input ~ 0
  32. *DSACK0_COP
  33. Wire Wire Line
  34. 11600 12600 11250 12600
  35. Text GLabel 11600 13600 2 60 Input ~ 0
  36. DELAY640NS
  37. Wire Wire Line
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  39. Text GLabel 9800 13700 0 60 Input ~ 0
  40. DELAY240NS
  41. Wire Wire Line
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  43. Text GLabel 9800 14800 0 60 Input ~ 0
  44. DELAY160NS
  45. Wire Wire Line
  46. 9800 12400 10150 12400
  47. Text GLabel 9800 12300 0 60 Output ~ 0
  48. *DSACK0
  49. Wire Wire Line
  50. 11250 11500 11600 11500
  51. Text GLabel 11600 14600 2 60 Input ~ 0
  52. *DSACK1_VID
  53. Wire Wire Line
  54. 11250 13500 11600 13500
  55. Text GLabel 11600 12500 2 60 Input ~ 0
  56. *DSACK1_COP
  57. Wire Wire Line
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  59. Text GLabel 11600 14000 2 60 Input ~ 0
  60. P24
  61. Wire Wire Line
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  64. P25
  65. Wire Wire Line
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  67. Text GLabel 11600 11600 2 60 Input ~ 0
  68. R/*W
  69. Wire Wire Line
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  71. Wire Wire Line
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  73. Text GLabel 9800 11000 0 60 Input ~ 0
  74. *MRESET
  75. Wire Wire Line
  76. 9800 11600 10150 11600
  77. Text GLabel 9800 11600 0 60 Output ~ 0
  78. *CS_VIDEO
  79. Wire Wire Line
  80. 9800 13500 10150 13500
  81. Text GLabel 9800 13500 0 60 Output ~ 0
  82. *IRQ_KEYB
  83. Wire Wire Line
  84. 9800 13000 10150 13000
  85. Text GLabel 9800 13000 0 60 Output ~ 0
  86. BC1
  87. Wire Wire Line
  88. 9800 12900 10150 12900
  89. Text GLabel 9800 12900 0 60 Output ~ 0
  90. BDIR
  91. Wire Wire Line
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  93. Text GLabel 11600 14300 2 60 Output ~ 0
  94. TDO
  95. $Comp
  96. L Device:C C54
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  98. P 18900 10900
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  100. AR Path="/5754931B/5758E0B2" Ref="C54" Part="1"
  101. F 0 "C54" H 18950 11000 50 0000 L CNN
  102. F 1 "100nF" H 18950 10800 50 0000 L CNN
  103. F 2 "Capacitor_THT:C_Rect_L7.0mm_W2.0mm_P5.00mm" H 18900 10900 60 0001 C CNN
  104. F 3 "" H 18900 10900 60 0000 C CNN
  105. 1 18900 10900
  106. 1 0 0 -1
  107. $EndComp
  108. $Comp
  109. L Device:C C38
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  112. AR Path="/5758E0E1" Ref="C38" Part="1"
  113. AR Path="/5754931B/5758E0E1" Ref="C38" Part="1"
  114. F 0 "C38" H 19250 11000 50 0000 L CNN
  115. F 1 "100nF" H 19250 10800 50 0000 L CNN
  116. F 2 "Capacitor_THT:C_Rect_L7.0mm_W2.0mm_P5.00mm" H 19200 10900 60 0001 C CNN
  117. F 3 "" H 19200 10900 60 0000 C CNN
  118. 1 19200 10900
  119. 1 0 0 -1
  120. $EndComp
  121. $Comp
  122. L Device:C C72
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  126. AR Path="/5754931B/5758E135" Ref="C72" Part="1"
  127. F 0 "C72" H 19550 11000 50 0000 L CNN
  128. F 1 "100nF" H 19550 10800 50 0000 L CNN
  129. F 2 "Capacitor_THT:C_Rect_L7.0mm_W2.0mm_P5.00mm" H 19500 10900 60 0001 C CNN
  130. F 3 "" H 19500 10900 60 0000 C CNN
  131. 1 19500 10900
  132. 1 0 0 -1
  133. $EndComp
  134. $Comp
  135. L Device:C C35
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  137. P 19800 10900
  138. AR Path="/5758E13B" Ref="C35" Part="1"
  139. AR Path="/5754931B/5758E13B" Ref="C35" Part="1"
  140. F 0 "C35" H 19850 11000 50 0000 L CNN
  141. F 1 "100nF" H 19850 10800 50 0000 L CNN
  142. F 2 "Capacitor_THT:C_Rect_L7.0mm_W2.0mm_P5.00mm" H 19800 10900 60 0001 C CNN
  143. F 3 "" H 19800 10900 60 0000 C CNN
  144. 1 19800 10900
  145. 1 0 0 -1
  146. $EndComp
  147. Wire Wire Line
  148. 18900 11100 18900 11150
  149. $Comp
  150. L power:VCC #PWR049
  151. U 1 1 5758E19C
  152. P 18900 10700
  153. F 0 "#PWR049" H 18900 10800 30 0001 C CNN
  154. F 1 "VCC" H 18900 10800 30 0000 C CNN
  155. F 2 "" H 18900 10700 60 0000 C CNN
  156. F 3 "" H 18900 10700 60 0000 C CNN
  157. 1 18900 10700
  158. 1 0 0 -1
  159. $EndComp
  160. $Comp
  161. L Jackalope-rescue:GND #PWR050
  162. U 1 1 5758E1BC
  163. P 18900 11150
  164. AR Path="/5758E1BC" Ref="#PWR050" Part="1"
  165. AR Path="/5754931B/5758E1BC" Ref="#PWR050" Part="1"
  166. F 0 "#PWR050" H 18900 11150 30 0001 C CNN
  167. F 1 "GND" H 18900 11080 30 0001 C CNN
  168. F 2 "" H 18900 11150 60 0000 C CNN
  169. F 3 "" H 18900 11150 60 0000 C CNN
  170. 1 18900 11150
  171. 1 0 0 -1
  172. $EndComp
  173. Connection ~ 18900 10700
  174. Text GLabel 11600 11700 2 60 Input ~ 0
  175. A0
  176. Text Notes 1950 2450 0 60 ~ 0
  177. CHIP SELECT 1\nGAL16V8\nCSEL1.2\nA25 A24 A23 A22 A21 A20 A19 A18 A17 GND\nA16 /CPUSPC AS /CSDRAM /CSVRAM /CSENET /CSROM /CSRAM /BLKSEL VCC\nBLKSEL = CPUSPC * /AS * /A25 * /A24 * /A23 * /A22 * /A21 * A20 * /A19 * /A18 * /A17 * /A16\nCSROM = CPUSPC * /AS * /A25 * /A24 * /A23 * /A22 * /A21 * /A20 * /A19\nCSRAM = CPUSPC * /AS * /A25 * /A24 * /A23 * /A22 * /A21 * /A20 * A19\nCSENET = CPUSPC * /AS * /A25 * /A24 * /A23 * /A22 * /A21 * A20 * /A19 * /A18 * /A17 * A16\nCSVRAM = CPUSPC * /AS * /A25 * /A24 * /A23 * /A22 * A21\nCSDRAM = CPUSPC * /AS * A25\nDESCRIPTION:\nINPUTS\nA25-A16 Address\nOUTPUTS\nChip selects\nBlockSelect to next address decoder\nRev 1.1 - Updated/corrected equations by Yoda
  178. Text Notes 14450 2550 0 60 ~ 0
  179. DSACK0 LOGIC\nGAL16V8\nDTACK0.1\n/ROM /RAM /FDC /RTC /SND /KEY DSNET /DSER /DPAR GND\n/DSCOP /DS0 DLA DLB DLC /DA /DB NC NC VCC\nDA = ROM * DLA\n+ RAM * DLA\n+ FDC * DLB\n+ RTC * DLC\n+ SND * DLC\n+ KEY * DLC\n+ /DSNET\nDB = DSER\n+ DPAR\n+ DSCOP\nDS0 = DA + DB
  180. Text Notes 1950 4150 0 60 ~ 0
  181. CHIP SELECT 2\nGAL16V8\nCSEL2.1\n/BLKSEL A15 A14 A13 A12 A11 A10 A9 A8 GND\nNC /CSSER /CSPAR /CSFDC /CSRTC /CSSND /CSVIDR /CSIDE /CSKEYB VCC\nCSSER = BLKSEL * /A15 * /A14 * /A13 * /A12 * /A11 * /A10 * /A9 * /A8\nCSPAR = BLKSEL * /A15 * /A14 * /A13 * /A12 * /A11 * /A10 * /A9 * A8\nCSFDC = BLKSEL * /A15 * /A14 * /A13 * /A12 * /A11 * /A10 * A9 * /A8\nCSRTC = BLKSEL * /A15 * /A14 * /A13 * /A12 * /A11 * /A10 * A9 * A8\nCSSND = BLKSEL * /A15 * /A14 * /A13 * /A12 * /A11 * A10 * /A9 * /A8\nCSVIDR = BLKSEL * /A15 * /A14 * /A13 * /A12 * A11 * /A10 * /A9 * /A8\nCSIDE = BLKSEL * /A15 * /A14 * /A13 * /A12 * A11 * /A10 * /A9 * A8\nCSKEYB = BLKSEL * /A15 * /A14 * /A13 * /A12 * /A11 * A10 * /A9 * A8
  182. Wire Wire Line
  183. 11250 13100 11600 13100
  184. Text GLabel 11600 11800 2 60 Input ~ 0
  185. A25
  186. Wire Wire Line
  187. 11250 12100 11600 12100
  188. Text GLabel 11600 12700 2 60 Input ~ 0
  189. A24
  190. Wire Wire Line
  191. 11250 14800 11600 14800
  192. Text GLabel 11600 13700 2 60 Input ~ 0
  193. A23
  194. Wire Wire Line
  195. 11250 12800 11600 12800
  196. Text GLabel 11600 14700 2 60 Input ~ 0
  197. A22
  198. Wire Wire Line
  199. 10150 13800 9800 13800
  200. Text GLabel 9800 15300 0 60 Input ~ 0
  201. A21
  202. Wire Wire Line
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  204. Text GLabel 11600 13200 2 60 Input ~ 0
  205. A20
  206. Wire Wire Line
  207. 11250 15200 11600 15200
  208. Text GLabel 11600 12200 2 60 Input ~ 0
  209. A19
  210. Wire Wire Line
  211. 10150 14300 9800 14300
  212. Text GLabel 9800 13900 0 60 Input ~ 0
  213. A18
  214. Wire Wire Line
  215. 11250 14200 11600 14200
  216. Text GLabel 11600 12800 2 60 Input ~ 0
  217. A17
  218. Wire Wire Line
  219. 11250 13200 11600 13200
  220. Text GLabel 11600 14800 2 60 Input ~ 0
  221. A16
  222. Wire Wire Line
  223. 9800 10900 10150 10900
  224. Text GLabel 9800 10900 0 60 Input ~ 0
  225. *AS
  226. Wire Wire Line
  227. 9800 12500 10150 12500
  228. Text GLabel 9800 12600 0 60 Output ~ 0
  229. *CS_DRAM
  230. Wire Wire Line
  231. 10150 15300 9800 15300
  232. Text GLabel 11600 13800 2 60 Input ~ 0
  233. A15
  234. Wire Wire Line
  235. 11250 12300 11600 12300
  236. Text GLabel 11600 12900 2 60 Input ~ 0
  237. A14
  238. Wire Wire Line
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  240. Text GLabel 9800 14100 0 60 Input ~ 0
  241. A13
  242. Wire Wire Line
  243. 11250 11800 11600 11800
  244. Text GLabel 11600 13000 2 60 Input ~ 0
  245. A12
  246. Wire Wire Line
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  248. Text GLabel 9800 12400 0 60 Input ~ 0
  249. A11
  250. Wire Wire Line
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  252. Text GLabel 9800 15200 0 60 Input ~ 0
  253. A10
  254. Wire Wire Line
  255. 11250 12900 11600 12900
  256. Text GLabel 11600 15100 2 60 Input ~ 0
  257. A9
  258. Wire Wire Line
  259. 11250 12000 11600 12000
  260. Text GLabel 11600 12100 2 60 Input ~ 0
  261. A8
  262. Wire Wire Line
  263. 9800 12800 10150 12800
  264. Text GLabel 9800 12800 0 60 Output ~ 0
  265. *CS_SRAM
  266. Wire Wire Line
  267. 9800 13100 10150 13100
  268. Text GLabel 9800 13100 0 60 Output ~ 0
  269. *CS_ROM
  270. Wire Wire Line
  271. 9800 12700 10150 12700
  272. Text GLabel 9800 12700 0 60 Output ~ 0
  273. *CS_ENET
  274. Wire Wire Line
  275. 9800 12100 10150 12100
  276. Text GLabel 9800 12100 0 60 Output ~ 0
  277. *CS_RTC
  278. Wire Wire Line
  279. 9800 11900 10150 11900
  280. Text GLabel 9800 11900 0 60 Output ~ 0
  281. *CS_KEYB
  282. Wire Wire Line
  283. 9800 12300 10150 12300
  284. Text GLabel 9800 12200 0 60 Output ~ 0
  285. *CS_IDE
  286. Wire Wire Line
  287. 9800 11500 10150 11500
  288. Text GLabel 9800 11500 0 60 Output ~ 0
  289. *CS_VIDR
  290. Wire Wire Line
  291. 9800 12000 10150 12000
  292. Text GLabel 9800 12000 0 60 Output ~ 0
  293. *CS_SER
  294. Wire Wire Line
  295. 9800 11800 10150 11800
  296. Text GLabel 9800 11800 0 60 Output ~ 0
  297. *CS_FDC
  298. Wire Wire Line
  299. 9800 11700 10150 11700
  300. Text GLabel 9800 11700 0 60 Output ~ 0
  301. *CS_PAR
  302. Text Notes 1700 7700 0 60 ~ 0
  303. MEMORY MAP\nDEVICE BASE ADDRESS SIZE (BYTES)\nHEX DEC HEX\n--------------------------------------------------------\nROM 00000000-0007FFFF 524288 00080000\nSRAM 00080000-000FFFFF 524288 00080000\nSERPORT 00100000-001000FF 256 00000100\nPARPORT 00100100-001001FF 256 00000100\nFDC 00100200-001002FF 256 00000100\nRTC 00100300-001003FF 256 00000100\nSOUND 00100400-001004FF 256 00000100\nKEYBD 00100500-001005FF 256 00000100\n--- 00100600-001009FF\nVIDREG* 00100A00-00100AFF 256 00000100\nIDE* 00100B00-00100BFF 256 00000100\n--- 00100C00-0010FFFF\nETHNET 00110000-0011FFFF 65536 00010000\n--- 00120000-001FFFFF\nVIDRAM* 00200000-003FFFFF 2097152 00200000\n--- 00400000-01FFFFFF\nDRAM# 02000000-03FFFFFF 33554432 02000000\n--- 04000000-FFFFFFFF\n*16 bit device / #32 bit device\nIDE is base address for drive 0\nDrive 1 is base + 128
  304. Text Notes 6500 7950 0 60 ~ 0
  305. BYTE DECODE\nGAL16V8\nBYDEC.2\nA0 A1 SIZ0 SIZ1 RW CSROM CSRAM CSENET CSVRAM GND\nNC /UUD /UMD /LMD /LLD CSDRAM CSVIDR NC /IOEN VCC\nUUD = RW + /A0 * /A1\nUMD = RW\n+ A0 * /A1\n+ /A1 * /SIZ0\n+ /A1 * SIZ1\nLMD = RW\n+ /A0 * A1\n+ /A1 * /SIZ0 * /SIZ1\n+ /A1 * SIZ0 * SIZ1\n+ /A1 * A0 * /SIZ0\nLLD = RW\n+ A0 * A1\n+ A0 * SIZ0 * SIZ1\n+ /SIZ0 * /SIZ1\n+ A1 * SIZ1\nIOEN = CSROM * CSRAM * CSENET * CSVRAM * CSDRAM * CSVIDR\nDESCRIPTION:\nByte select logic on 32 bit bus\nMC68030 User's manual page section 12-13\nFigure 12-7\nRev 1.1 - Updated/corrected equations by Yoda
  306. Text Notes 10500 8250 0 60 ~ 0
  307. COPROCESSOR DECODE\nGAL16V8\nDRMGLU.2\nBCLK /CS /AS /WR /DTACK NC /ADDW CLK NC GND\n/OE /STERM /DC NC /DB /DA MLCLK /ENCAS /AREQ VCC\nAREQ = AS * CS * CLK\n+ AREQ * CS * /CLK\nENCAS = AREQ * CS * /DC\n+ AREQ * CS * /CLK\nDC = AS * CS * DB * /CLK\n+ AS * CS * DC * CLK\nSTERM = AS * CS * DA * /DB * /CLK * ADDW\n+ AS * CS * DTACK * /DB * /CLK * /ADDW\n+ /STERM * CLK\nMLCLK= CS * AS * WR\nDA.R = AREQ * CS * DTACK * /DB * ADDW\nDB.R = AREQ * CS * DTACK * DA * /DB * ADDW\n+ AREQ * CS * DTACK * /DB * /ADDW\nDESCRIPTION:\nDP8422V DRAM Controller Interface logic\nNational Application Note AN-537\n"Interfacing the DP8420A/21A/22A to the 68030 Microprocessor"\nPage 3\nPDF -\nconverted from National PLAN format\nremoved EXST from equations (External STERM)\nRev 1.1 - Updated/corrected equations by Yoda
  308. Text Notes 14650 13550 0 60 ~ 0
  309. COPROCESSOR DECODE\nGAL16V8\nCOPRO.1\nCLK AS FC2 FC1 FC0 A19 A18 A17 A16 GND\nA15 /CS /CLKD A14 A13 NC NC NC CPU VCC\nCS = FC2 * FC1 * FC0\n* /A19 * /A18 * A17 * /A16\n* /A15 * /A14 * A13\n* /CLK\n+ FC2 * FC1 * FC0\n* /A19 * /A18 * A17 * /A16\n* /A15 * /A14 * A13\n* /AS\n+ FC2 * FC1 * FC0\n* /A19 * /A18 * A17 * /A16\n* /A15 * /A14 * A13\n* /CLKD\nCLKD = CLK\n; PDF - added for peripheral chipselect1 logic\nCPU = FC2 * FC1 * FC0\nDESCRIPTION:\nMC68882 chip select logic\nMC68030 User's manual section 12-8\nFigure 12-4
  310. Text Notes 18400 13150 0 60 ~ 0
  311. NOTES:\n8422V PROGRAMMING\n\nTI DP8422V Datasheet Ref. Page 9 section 3.2.2\nChip select access programming. Reset causes /DISRFSH to\nassert and FF to assert /ML. The first write of CPU on boot\nMUST provide 8422 programming data with program word on\naddress bus, asserting /CS_DRAM. Upon write completion FF\nwill negate /ML and write cycle terminates via normal /STERM.\n8422 will be ready for normal operation.\n\nGAL LOGIC COMPILER\nAll GAL equations can be compiled with GALASM\nhttps://github.com/daveho/GALasm
  312. Wire Wire Line
  313. 10150 14400 9800 14400
  314. Text GLabel 9800 14400 0 60 Input ~ 0
  315. TMS
  316. Wire Wire Line
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  318. Text GLabel 9800 13400 0 60 Input ~ 0
  319. TDI
  320. Wire Wire Line
  321. 11250 13000 11600 13000
  322. Text GLabel 9800 15100 0 60 Input ~ 0
  323. *IPL0
  324. Wire Wire Line
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  326. Text GLabel 11600 13100 2 60 Input ~ 0
  327. *IPL1
  328. Wire Wire Line
  329. 11250 14000 11600 14000
  330. Text GLabel 9800 14200 0 60 Input ~ 0
  331. *IPL2
  332. Wire Wire Line
  333. 9800 13700 10150 13700
  334. Text GLabel 9800 13600 0 60 Output ~ 0
  335. *AVEC
  336. Text Notes 1700 11000 0 60 ~ 0
  337. GAL16V8\nEXTRA\n\nCPUSPC /AS /IPL0 /IPL1 /IPL2 NC NC NC NC GND\nNC NC NC NC NC NC NC NC /AVEC VCC\n\nAVEC = CPUSPC * AS * IPL0\n + CPUSPC * AS * IPL1\n + CPUSPC * AS * IPL2\n\nDESCRIPTION:\n\nLOGIC FOR AVEC\n
  338. $Comp
  339. L Device:C C74
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  347. F 3 "" H 20100 10900 60 0000 C CNN
  348. 1 20100 10900
  349. 1 0 0 -1
  350. $EndComp
  351. $Comp
  352. L power:VCC #PWR051
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  356. F 1 "VCC" H 1100 13500 30 0000 C CNN
  357. F 2 "" H 1100 13400 60 0000 C CNN
  358. F 3 "" H 1100 13400 60 0000 C CNN
  359. 1 1100 13400
  360. 1 0 0 -1
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  362. $Comp
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  374. $EndComp
  375. Text Notes 14450 5000 0 60 ~ 0
  376. DSACK1/MISC DECODE\nGAL16V8\nDSACK1.1\n\n/DVID /DCOP /DIDE /CSVM /CSVR P24 P25 /WR A0 GND\n/CSSND /BDIR /BC1 /INTKB /CSVID NC NC DLA /DS1 VCC\n\nDS1 = DVID\n + DCOP\n + DIDE * DLA\n \nCSVID = CSVM + CSVR\n \nINTKB = P24 + P25\n\n/BDIR = CSSND * WR\n\n/BC1 = CSSND * A0\n\n\nDESCRIPTION:\n\nDSACK1 generation for 16 bit devices\nDLx are selected wait state delay inputs\n
  377. Text GLabel 11600 15300 2 60 Input ~ 0
  378. FC0
  379. Text GLabel 11600 12300 2 60 Input ~ 0
  380. FC1
  381. Text GLabel 9800 15400 0 60 Input ~ 0
  382. FC2
  383. Text GLabel 11600 13300 2 60 Input ~ 0
  384. TCK
  385. Wire Wire Line
  386. 11600 13300 11250 13300
  387. Wire Wire Line
  388. 9800 15400 10150 15400
  389. Wire Wire Line
  390. 9800 13300 10150 13300
  391. Wire Wire Line
  392. 11600 12200 11250 12200
  393. Text GLabel 9800 14300 0 60 Input ~ 0
  394. A26
  395. Text GLabel 9800 14900 0 60 Input ~ 0
  396. A27
  397. Text GLabel 11600 14100 2 60 Input ~ 0
  398. A28
  399. Text GLabel 9800 13300 0 60 Input ~ 0
  400. A29
  401. Text GLabel 11600 15200 2 60 Input ~ 0
  402. A30
  403. Text GLabel 11600 14200 2 60 Input ~ 0
  404. A31
  405. Wire Wire Line
  406. 9800 15200 10150 15200
  407. Wire Wire Line
  408. 9800 14800 10150 14800
  409. Wire Wire Line
  410. 9800 14200 10150 14200
  411. Wire Wire Line
  412. 11600 13800 11250 13800
  413. Wire Wire Line
  414. 11600 13700 11250 13700
  415. Wire Wire Line
  416. 11600 14100 11250 14100
  417. Wire Wire Line
  418. 9800 13600 10150 13600
  419. Text GLabel 9800 12500 0 60 Output ~ 0
  420. *CS_COPROC
  421. Wire Wire Line
  422. 9800 14600 10150 14600
  423. Text GLabel 9800 14600 0 60 Output ~ 0
  424. *DSACK1
  425. Wire Wire Line
  426. 9800 13200 10150 13200
  427. Text GLabel 9800 13200 0 60 Output ~ 0
  428. *IOEN
  429. $Comp
  430. L 74HCxx_custom:CONN_5X2 J19
  431. U 1 1 57708C8C
  432. P 13650 11350
  433. F 0 "J19" H 13650 11650 60 0000 C CNN
  434. F 1 "JTAG GLUE" V 13650 11350 50 0000 C CNN
  435. F 2 "Connector_PinHeader_2.54mm:PinHeader_2x05_P2.54mm_Vertical" H 13650 11350 60 0001 C CNN
  436. F 3 "" H 13650 11350 60 0000 C CNN
  437. 1 13650 11350
  438. 1 0 0 -1
  439. $EndComp
  440. Text GLabel 12900 11150 0 60 Output ~ 0
  441. TCK
  442. Wire Wire Line
  443. 13250 11150 12900 11150
  444. $Comp
  445. L Jackalope-rescue:GND #PWR053
  446. U 1 1 577093D5
  447. P 14150 11600
  448. AR Path="/577093D5" Ref="#PWR053" Part="1"
  449. AR Path="/5754931B/577093D5" Ref="#PWR053" Part="1"
  450. F 0 "#PWR053" H 14150 11600 30 0001 C CNN
  451. F 1 "GND" H 14150 11530 30 0001 C CNN
  452. F 2 "" H 14150 11600 60 0000 C CNN
  453. F 3 "" H 14150 11600 60 0000 C CNN
  454. 1 14150 11600
  455. 1 0 0 -1
  456. $EndComp
  457. Wire Wire Line
  458. 14150 11150 14150 11550
  459. Wire Wire Line
  460. 13250 11250 12900 11250
  461. Text GLabel 12900 11250 0 60 Input ~ 0
  462. TDO
  463. Wire Wire Line
  464. 14050 11250 14400 11250
  465. $Comp
  466. L power:VCC #PWR054
  467. U 1 1 57709F63
  468. P 14400 11250
  469. F 0 "#PWR054" H 14400 11350 30 0001 C CNN
  470. F 1 "VCC" H 14400 11350 30 0000 C CNN
  471. F 2 "" H 14400 11250 60 0000 C CNN
  472. F 3 "" H 14400 11250 60 0000 C CNN
  473. 1 14400 11250
  474. 1 0 0 -1
  475. $EndComp
  476. Wire Wire Line
  477. 12900 11350 13250 11350
  478. Text GLabel 12900 11350 0 60 Output ~ 0
  479. TMS
  480. NoConn ~ 14050 11350
  481. NoConn ~ 13250 11450
  482. NoConn ~ 14050 11450
  483. Wire Wire Line
  484. 12900 11550 13250 11550
  485. Text GLabel 12900 11550 0 60 Output ~ 0
  486. TDI
  487. Wire Wire Line
  488. 14050 11550 14150 11550
  489. Wire Wire Line
  490. 14050 11150 14150 11150
  491. Connection ~ 14150 11550
  492. Text Notes 10450 10550 0 60 ~ 0
  493. GLUE CPLD
  494. NoConn ~ 10150 11100
  495. NoConn ~ 10150 11200
  496. Wire Wire Line
  497. 11250 14700 11600 14700
  498. Wire Wire Line
  499. 9800 12600 10150 12600
  500. Wire Wire Line
  501. 9800 12200 10150 12200
  502. Wire Wire Line
  503. 9800 14700 10150 14700
  504. Wire Wire Line
  505. 9800 15100 10150 15100
  506. Wire Wire Line
  507. 11600 13400 11250 13400
  508. Wire Wire Line
  509. 11250 15000 11600 15000
  510. Wire Wire Line
  511. 11250 11900 11600 11900
  512. Wire Wire Line
  513. 10150 14000 9800 14000
  514. Wire Wire Line
  515. 10150 14500 9800 14500
  516. Wire Wire Line
  517. 11250 11400 11600 11400
  518. NoConn ~ 9800 13800
  519. NoConn ~ 9800 14000
  520. NoConn ~ 9800 14500
  521. NoConn ~ 9800 15000
  522. NoConn ~ 11600 11400
  523. NoConn ~ 11600 11500
  524. NoConn ~ 11600 11900
  525. NoConn ~ 11600 12000
  526. NoConn ~ 11600 12400
  527. NoConn ~ 11600 13400
  528. NoConn ~ 11600 14900
  529. Wire Wire Line
  530. 11600 14400 11250 14400
  531. NoConn ~ 11600 14400
  532. Wire Wire Line
  533. 11600 13900 11250 13900
  534. NoConn ~ 11600 13900
  535. Wire Wire Line
  536. 14150 11550 14150 11600
  537. Wire Wire Line
  538. 18900 10750 18900 10700
  539. Wire Wire Line
  540. 18900 10700 19200 10700
  541. Wire Wire Line
  542. 18900 11100 19200 11100
  543. Wire Wire Line
  544. 19200 10750 19200 10700
  545. Connection ~ 19200 10700
  546. Wire Wire Line
  547. 19200 10700 19500 10700
  548. Wire Wire Line
  549. 19500 10750 19500 10700
  550. Connection ~ 19500 10700
  551. Wire Wire Line
  552. 19500 10700 19800 10700
  553. Wire Wire Line
  554. 19800 10750 19800 10700
  555. Connection ~ 19800 10700
  556. Wire Wire Line
  557. 19800 10700 20100 10700
  558. Wire Wire Line
  559. 20100 10750 20100 10700
  560. Wire Wire Line
  561. 20100 11050 20100 11100
  562. Wire Wire Line
  563. 19800 11050 19800 11100
  564. Connection ~ 19800 11100
  565. Wire Wire Line
  566. 19800 11100 20100 11100
  567. Wire Wire Line
  568. 19500 11050 19500 11100
  569. Connection ~ 19500 11100
  570. Wire Wire Line
  571. 19500 11100 19800 11100
  572. Wire Wire Line
  573. 19200 11050 19200 11100
  574. Connection ~ 19200 11100
  575. Wire Wire Line
  576. 19200 11100 19500 11100
  577. Wire Wire Line
  578. 18900 11050 18900 11100
  579. Connection ~ 18900 11100
  580. Wire Wire Line
  581. 1100 13400 1100 13600
  582. Wire Wire Line
  583. 1100 13600 1300 13600
  584. Wire Wire Line
  585. 1100 13600 1100 13900
  586. Wire Wire Line
  587. 1100 13900 1300 13900
  588. Connection ~ 1100 13600
  589. Wire Wire Line
  590. 1100 13900 1100 14200
  591. Wire Wire Line
  592. 1100 14200 1300 14200
  593. Connection ~ 1100 13900
  594. Wire Wire Line
  595. 1100 14200 1100 14550
  596. Wire Wire Line
  597. 1100 14550 1300 14550
  598. Connection ~ 1100 14200
  599. Wire Wire Line
  600. 1100 14550 1100 14900
  601. Wire Wire Line
  602. 1100 14900 1300 14900
  603. Connection ~ 1100 14550
  604. Wire Wire Line
  605. 1100 14900 1100 15250
  606. Wire Wire Line
  607. 1100 15250 1300 15250
  608. Connection ~ 1100 14900
  609. Wire Wire Line
  610. 1100 15250 1100 15600
  611. Wire Wire Line
  612. 1100 15600 1300 15600
  613. Connection ~ 1100 15250
  614. Wire Wire Line
  615. 1100 15600 1100 15950
  616. Wire Wire Line
  617. 1100 15950 1300 15950
  618. Connection ~ 1100 15600
  619. Wire Wire Line
  620. 2500 13400 2500 13600
  621. Wire Wire Line
  622. 2500 13600 2700 13600
  623. Wire Wire Line
  624. 2500 13600 2500 13900
  625. Wire Wire Line
  626. 2500 13900 2700 13900
  627. Connection ~ 2500 13600
  628. Wire Wire Line
  629. 2500 13900 2500 14200
  630. Wire Wire Line
  631. 2500 14200 2700 14200
  632. Connection ~ 2500 13900
  633. Wire Wire Line
  634. 2500 14200 2500 14500
  635. Wire Wire Line
  636. 2500 14500 2700 14500
  637. Connection ~ 2500 14200
  638. Wire Wire Line
  639. 2500 14500 2500 14800
  640. Wire Wire Line
  641. 2500 14800 2700 14800
  642. Connection ~ 2500 14500
  643. Wire Wire Line
  644. 2500 14800 2500 15100
  645. Wire Wire Line
  646. 2500 15100 2700 15100
  647. Connection ~ 2500 14800
  648. Wire Wire Line
  649. 2500 15100 2500 15400
  650. Wire Wire Line
  651. 2500 15400 2700 15400
  652. Connection ~ 2500 15100
  653. Wire Wire Line
  654. 2500 15400 2500 15700
  655. Wire Wire Line
  656. 2500 15700 2700 15700
  657. Connection ~ 2500 15400
  658. $Comp
  659. L altera_oshec:EPM7128-P100 U42
  660. U 17 1 66C75449
  661. P 10650 13000
  662. F 0 "U42" H 10700 15365 50 0000 C CNN
  663. F 1 "EPM7128-P100" H 10700 15274 50 0000 C CNN
  664. F 2 "PGA128Adapter:PGA100Adapter" H 10650 13150 50 0001 C CNN
  665. F 3 "" H 10650 13000 60 0001 C CNN
  666. 17 10650 13000
  667. 1 0 0 -1
  668. $EndComp
  669. $Comp
  670. L altera_oshec:EPM7128-P100 U42
  671. U 1 1 66C759BD
  672. P 1300 13500
  673. F 0 "U42" H 1223 13430 50 0000 R CNN
  674. F 1 "EPM7128-P100" H 1223 13521 50 0000 R CNN
  675. F 2 "PGA128Adapter:PGA100Adapter" H 1300 13650 50 0001 C CNN
  676. F 3 "" H 1300 13500 60 0001 C CNN
  677. 1 1300 13500
  678. -1 0 0 1
  679. $EndComp
  680. $Comp
  681. L altera_oshec:EPM7128-P100 U42
  682. U 2 1 66C75A42
  683. P 1300 13800
  684. F 0 "U42" H 1223 13730 50 0000 R CNN
  685. F 1 "EPM7128-P100" H 1223 13821 50 0000 R CNN
  686. F 2 "PGA128Adapter:PGA100Adapter" H 1300 13950 50 0001 C CNN
  687. F 3 "" H 1300 13800 60 0001 C CNN
  688. 2 1300 13800
  689. -1 0 0 1
  690. $EndComp
  691. $Comp
  692. L altera_oshec:EPM7128-P100 U42
  693. U 3 1 66C75ADC
  694. P 1300 14100
  695. F 0 "U42" H 1223 13990 50 0000 R CNN
  696. F 1 "EPM7128-P100" H 1223 14081 50 0000 R CNN
  697. F 2 "PGA128Adapter:PGA100Adapter" H 1300 14250 50 0001 C CNN
  698. F 3 "" H 1300 14100 60 0001 C CNN
  699. 3 1300 14100
  700. -1 0 0 1
  701. $EndComp
  702. $Comp
  703. L altera_oshec:EPM7128-P100 U42
  704. U 4 1 66C75B55
  705. P 1300 14450
  706. F 0 "U42" H 1223 14340 50 0000 R CNN
  707. F 1 "EPM7128-P100" H 1223 14431 50 0000 R CNN
  708. F 2 "PGA128Adapter:PGA100Adapter" H 1300 14600 50 0001 C CNN
  709. F 3 "" H 1300 14450 60 0001 C CNN
  710. 4 1300 14450
  711. -1 0 0 1
  712. $EndComp
  713. $Comp
  714. L altera_oshec:EPM7128-P100 U42
  715. U 5 1 66C75BDD
  716. P 1300 14800
  717. F 0 "U42" H 1223 14690 50 0000 R CNN
  718. F 1 "EPM7128-P100" H 1223 14781 50 0000 R CNN
  719. F 2 "PGA128Adapter:PGA100Adapter" H 1300 14950 50 0001 C CNN
  720. F 3 "" H 1300 14800 60 0001 C CNN
  721. 5 1300 14800
  722. -1 0 0 1
  723. $EndComp
  724. $Comp
  725. L altera_oshec:EPM7128-P100 U42
  726. U 6 1 66C75C84
  727. P 1300 15150
  728. F 0 "U42" H 1223 15040 50 0000 R CNN
  729. F 1 "EPM7128-P100" H 1223 15131 50 0000 R CNN
  730. F 2 "PGA128Adapter:PGA100Adapter" H 1300 15300 50 0001 C CNN
  731. F 3 "" H 1300 15150 60 0001 C CNN
  732. 6 1300 15150
  733. -1 0 0 1
  734. $EndComp
  735. $Comp
  736. L altera_oshec:EPM7128-P100 U42
  737. U 7 1 66C75D22
  738. P 1300 15500
  739. F 0 "U42" H 1223 15390 50 0000 R CNN
  740. F 1 "EPM7128-P100" H 1223 15481 50 0000 R CNN
  741. F 2 "PGA128Adapter:PGA100Adapter" H 1300 15650 50 0001 C CNN
  742. F 3 "" H 1300 15500 60 0001 C CNN
  743. 7 1300 15500
  744. -1 0 0 1
  745. $EndComp
  746. $Comp
  747. L altera_oshec:EPM7128-P100 U42
  748. U 8 1 66C75DC5
  749. P 1300 15850
  750. F 0 "U42" H 1223 15740 50 0000 R CNN
  751. F 1 "EPM7128-P100" H 1223 15831 50 0000 R CNN
  752. F 2 "PGA128Adapter:PGA100Adapter" H 1300 16000 50 0001 C CNN
  753. F 3 "" H 1300 15850 60 0001 C CNN
  754. 8 1300 15850
  755. -1 0 0 1
  756. $EndComp
  757. $Comp
  758. L altera_oshec:EPM7128-P100 U42
  759. U 9 1 66C75E79
  760. P 2700 13500
  761. F 0 "U42" H 2753 13570 50 0000 L CNN
  762. F 1 "EPM7128-P100" H 2753 13479 50 0000 L CNN
  763. F 2 "PGA128Adapter:PGA100Adapter" H 2700 13650 50 0001 C CNN
  764. F 3 "" H 2700 13500 60 0001 C CNN
  765. 9 2700 13500
  766. 1 0 0 -1
  767. $EndComp
  768. $Comp
  769. L altera_oshec:EPM7128-P100 U42
  770. U 10 1 66C75F24
  771. P 2700 13800
  772. F 0 "U42" H 2753 13870 50 0000 L CNN
  773. F 1 "EPM7128-P100" H 2753 13779 50 0000 L CNN
  774. F 2 "PGA128Adapter:PGA100Adapter" H 2700 13950 50 0001 C CNN
  775. F 3 "" H 2700 13800 60 0001 C CNN
  776. 10 2700 13800
  777. 1 0 0 -1
  778. $EndComp
  779. $Comp
  780. L altera_oshec:EPM7128-P100 U42
  781. U 11 1 66C75FB0
  782. P 2700 14100
  783. F 0 "U42" H 2753 14170 50 0000 L CNN
  784. F 1 "EPM7128-P100" H 2753 14079 50 0000 L CNN
  785. F 2 "PGA128Adapter:PGA100Adapter" H 2700 14250 50 0001 C CNN
  786. F 3 "" H 2700 14100 60 0001 C CNN
  787. 11 2700 14100
  788. 1 0 0 -1
  789. $EndComp
  790. $Comp
  791. L altera_oshec:EPM7128-P100 U42
  792. U 12 1 66C76031
  793. P 2700 14400
  794. F 0 "U42" H 2753 14470 50 0000 L CNN
  795. F 1 "EPM7128-P100" H 2753 14379 50 0000 L CNN
  796. F 2 "PGA128Adapter:PGA100Adapter" H 2700 14550 50 0001 C CNN
  797. F 3 "" H 2700 14400 60 0001 C CNN
  798. 12 2700 14400
  799. 1 0 0 -1
  800. $EndComp
  801. $Comp
  802. L altera_oshec:EPM7128-P100 U42
  803. U 13 1 66C760D7
  804. P 2700 14700
  805. F 0 "U42" H 2753 14770 50 0000 L CNN
  806. F 1 "EPM7128-P100" H 2753 14679 50 0000 L CNN
  807. F 2 "PGA128Adapter:PGA100Adapter" H 2700 14850 50 0001 C CNN
  808. F 3 "" H 2700 14700 60 0001 C CNN
  809. 13 2700 14700
  810. 1 0 0 -1
  811. $EndComp
  812. $Comp
  813. L altera_oshec:EPM7128-P100 U42
  814. U 14 1 66C76162
  815. P 2700 15000
  816. F 0 "U42" H 2753 15070 50 0000 L CNN
  817. F 1 "EPM7128-P100" H 2753 14979 50 0000 L CNN
  818. F 2 "PGA128Adapter:PGA100Adapter" H 2700 15150 50 0001 C CNN
  819. F 3 "" H 2700 15000 60 0001 C CNN
  820. 14 2700 15000
  821. 1 0 0 -1
  822. $EndComp
  823. $Comp
  824. L altera_oshec:EPM7128-P100 U42
  825. U 15 1 66C761F4
  826. P 2700 15300
  827. F 0 "U42" H 2753 15370 50 0000 L CNN
  828. F 1 "EPM7128-P100" H 2753 15279 50 0000 L CNN
  829. F 2 "PGA128Adapter:PGA100Adapter" H 2700 15450 50 0001 C CNN
  830. F 3 "" H 2700 15300 60 0001 C CNN
  831. 15 2700 15300
  832. 1 0 0 -1
  833. $EndComp
  834. $Comp
  835. L altera_oshec:EPM7128-P100 U42
  836. U 16 1 66C762A3
  837. P 2700 15600
  838. F 0 "U42" H 2753 15670 50 0000 L CNN
  839. F 1 "EPM7128-P100" H 2753 15579 50 0000 L CNN
  840. F 2 "PGA128Adapter:PGA100Adapter" H 2700 15750 50 0001 C CNN
  841. F 3 "" H 2700 15600 60 0001 C CNN
  842. 16 2700 15600
  843. 1 0 0 -1
  844. $EndComp
  845. $EndSCHEMATC