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First import

Dashie der otter 4 weeks ago
commit
ddb0e55704
Signed by: Dashie <dashie@sigpipe.me> GPG Key ID: C2D57B325840B755
37 changed files with 208387 additions and 0 deletions
  1. 2122
    0
      74HCxx_custom.lib
  2. 56
    0
      8242kbd.lib
  3. 106
    0
      AS4C1M16E5.lib
  4. 92
    0
      DP8422V.lib
  5. 3623
    0
      Jackalope-CPU Memory.sch
  6. 804
    0
      Jackalope-Glue Logic.sch
  7. 3945
    0
      Jackalope-Peripherals.sch
  8. 623
    0
      Jackalope-Power.sch
  9. 1993
    0
      Jackalope-Video Ethernet.sch
  10. 2783
    0
      Jackalope-cache.lib
  11. 48
    0
      Jackalope-rescue.lib
  12. 279
    0
      Jackalope.csv
  13. 68159
    0
      Jackalope.dsn
  14. 48065
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      Jackalope.kicad_pcb
  15. 6310
    0
      Jackalope.net
  16. 112
    0
      Jackalope.pro
  17. 172
    0
      Jackalope.rules
  18. 98
    0
      Jackalope.sch
  19. 25389
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      Jackalope.ses
  20. 7490
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      Jackalope.xml
  21. 650
    0
      N8VEM-KiCAD.lib
  22. 34
    0
      RTC72421.lib
  23. 2196
    0
      am29-memory.lib
  24. 56
    0
      ay-3-8910.lib
  25. 50
    0
      conn_17x2.lib
  26. 61
    0
      mc68681-PLCC.lib
  27. 5269
    0
      micro-intel.lib
  28. 1763
    0
      micro-mc68000.lib
  29. 449
    0
      mini_din.lib
  30. 13902
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      o_ttl.lib
  31. 4715
    0
      opendous.lib
  32. 97
    0
      rtl8019as.lib
  33. 123
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      s1d13505.lib
  34. 87
    0
      simm72pin.lib
  35. 4405
    0
      special.lib
  36. 2200
    0
      tm-kicad-lib.lib
  37. 61
    0
      wd37c65.lib

+ 2122
- 0
74HCxx_custom.lib
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+ 56
- 0
8242kbd.lib View File

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+EESchema-LIBRARY Version 2.3
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+#encoding utf-8
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+#
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+# 8242KBD
5
+#
6
+DEF 8242KBD U 0 40 Y Y 1 F N
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+F0 "U" 0 50 60 H V C CNN
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+F1 "8242KBD" 0 -50 60 H V C CNN
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+F2 "" 0 0 60 H V C CNN
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+F3 "" 0 0 60 H V C CNN
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+DRAW
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+S 500 -1350 -500 1300 0 1 0 N
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+X KBCI 1 -800 -1150 300 R 50 50 1 1 I
14
+X XTAL1 2 -800 1250 300 R 50 50 1 1 I
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+X XTAL2 3 -800 1150 300 R 50 50 1 1 I
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+X ~RESET 4 -800 950 300 R 50 50 1 1 I I
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+X ~SS 5 -800 750 300 R 50 50 1 1 I I
18
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19
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+X ~WR 10 -800 -950 300 R 50 50 1 1 I I
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+X P13 30 800 550 300 L 50 50 1 1 B
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+X VCC 40 -100 1300 0 D 50 50 1 1 W N
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+X KBDI/MSCI 39 -800 -1250 300 R 50 50 1 1 I
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+ENDDRAW
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+ENDDEF
55
+#
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+#End Library

+ 106
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AS4C1M16E5.lib View File

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+EESchema-LIBRARY Version 2.3
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+#encoding utf-8
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+#
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+# AS4C1M16E5-SOJ42
5
+#
6
+DEF AS4C1M16E5-SOJ42 U 0 30 Y Y 1 F N
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+F0 "U" -400 1950 60 H V C CNN
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+F1 "AS4C1M16E5-SOJ42" 0 -200 60 V V C CNN
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+F2 "" 0 800 60 H V C CNN
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+F3 "" 0 800 60 H V C CNN
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+DRAW
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+ENDDRAW
53
+ENDDEF
54
+#
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+# AS4C1M16E5-TSOPII
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+#
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+DEF AS4C1M16E5-TSOPII U 0 30 Y Y 1 F N
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+F0 "U" -400 1950 60 H V C CNN
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+F1 "AS4C1M16E5-TSOPII" 0 -200 60 V V C CNN
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+F2 "" 0 800 60 H V C CNN
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+F3 "" 0 800 60 H V C CNN
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+DRAW
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+X DQ15 49 -800 -1800 300 R 60 60 1 1 B
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+ENDDRAW
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+ENDDEF
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+#
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+#End Library

+ 92
- 0
DP8422V.lib View File

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+EESchema-LIBRARY Version 2.3
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+#encoding utf-8
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+#
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+# DP8422V
5
+#
6
+DEF DP8422V U 0 40 Y Y 2 L N
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+F0 "U" -750 2650 60 H V C CNN
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+F1 "DP8422V" -600 -2600 60 H V C CNN
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+F2 "" 500 -300 60 H V C CNN
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+F3 "" 500 -300 60 H V C CNN
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+DRAW
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80
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+X GND 61 50 -300 200 U 50 50 2 1 W
82
+X VCC 42 -50 300 200 D 50 50 2 1 W
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+X GND 63 150 -300 200 U 50 50 2 1 W
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+X GND 83 350 -300 200 U 50 50 2 1 W
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+X GND 44 -50 -300 200 U 50 50 2 1 W
86
+X GND 64 250 -300 200 U 50 50 2 1 W
87
+X VCC 66 150 300 200 D 50 50 2 1 W
88
+X VCC 59 50 300 200 D 50 50 2 1 W
89
+ENDDRAW
90
+ENDDEF
91
+#
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+#End Library

+ 3623
- 0
Jackalope-CPU Memory.sch
File diff suppressed because it is too large
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+ 804
- 0
Jackalope-Glue Logic.sch
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+ 3945
- 0
Jackalope-Peripherals.sch
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+ 623
- 0
Jackalope-Power.sch View File

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1
+EESchema Schematic File Version 2
2
+LIBS:power
3
+LIBS:device
4
+LIBS:transistors
5
+LIBS:conn
6
+LIBS:linear
7
+LIBS:regul
8
+LIBS:74xx
9
+LIBS:cmos4000
10
+LIBS:adc-dac
11
+LIBS:memory
12
+LIBS:xilinx
13
+LIBS:special
14
+LIBS:microcontrollers
15
+LIBS:dsp
16
+LIBS:microchip
17
+LIBS:analog_switches
18
+LIBS:motorola
19
+LIBS:texas
20
+LIBS:intel
21
+LIBS:audio
22
+LIBS:interface
23
+LIBS:digital-audio
24
+LIBS:philips
25
+LIBS:display
26
+LIBS:cypress
27
+LIBS:siliconi
28
+LIBS:opto
29
+LIBS:atmel
30
+LIBS:contrib
31
+LIBS:valves
32
+LIBS:micro-mc68000
33
+LIBS:o_ttl
34
+LIBS:micro-intel
35
+LIBS:am29-memory
36
+LIBS:DP8422V
37
+LIBS:simm72pin
38
+LIBS:N8VEM-KiCAD
39
+LIBS:8242kbd
40
+LIBS:wd37c65
41
+LIBS:ay-3-8910
42
+LIBS:RTC72421
43
+LIBS:conn_17x2
44
+LIBS:mini_din
45
+LIBS:mc68681-PLCC
46
+LIBS:s1d13505
47
+LIBS:AS4C1M16E5
48
+LIBS:rtl8019as
49
+LIBS:74HCxx_custom
50
+LIBS:altera
51
+LIBS:opendous
52
+LIBS:tm-kicad-lib
53
+LIBS:Jackalope-cache
54
+EELAYER 25 0
55
+EELAYER END
56
+$Descr B 17000 11000
57
+encoding utf-8
58
+Sheet 6 6
59
+Title "6809 and 6502 ATX and 6U"
60
+Date "19 feb 2014"
61
+Rev "012"
62
+Comp "N8VEM Users Group"
63
+Comment1 "Licensed for hobbyist use only.  All other rights reserved."
64
+Comment2 "Copyright (c) 2013-2014  Andrew Lynch and John Coffman"
65
+Comment3 ""
66
+Comment4 ""
67
+$EndDescr
68
+Connection ~ 5650 2350
69
+$Comp
70
+L PWR_FLAG #FLG0147
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+U 1 1 57649BA4
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+P 5650 2350
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+F 0 "#FLG0147" H 5650 2620 30  0001 C CNN
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+F 1 "PWR_FLAG" H 5650 2580 30  0000 C CNN
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+F 2 "" H 5650 2350 60  0001 C CNN
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+F 3 "" H 5650 2350 60  0001 C CNN
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+	1    5650 2350
78
+	1    0    0    -1  
79
+$EndComp
80
+Wire Wire Line
81
+	5650 2800 6450 2800
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+Wire Wire Line
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+	4650 2900 4650 3850
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+Connection ~ 6000 3500
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+Wire Wire Line
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+Connection ~ 4650 3100
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+Wire Wire Line
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+Wire Wire Line
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+Wire Wire Line
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+Text Notes 4950 3900 0    60   ~ 0
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+ATX Connector
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+$Comp
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+L PWR_FLAG #GND0148
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+U 1 1 57649BA9
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Jackalope-Video Ethernet.sch
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+ 2783
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Jackalope-rescue.lib View File

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+EESchema-LIBRARY Version 2.3
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+#encoding utf-8
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+#
4
+# SRAM_512Ko-RESCUE-Jackalope
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+#
6
+DEF SRAM_512Ko-RESCUE-Jackalope U 0 40 Y Y 1 F N
7
+F0 "U" 100 1200 70 H V L CNN
8
+F1 "SRAM_512Ko-RESCUE-Jackalope" 100 -1200 70 H V L CNN
9
+F2 "" 0 0 60 H V C CNN
10
+F3 "" 0 0 60 H V C CNN
11
+DRAW
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+#
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Jackalope.csv View File

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+Reference, Value, Footprint, Datasheet
2
+U30,MC68030RC,micro-68x_db:micro-68x_db-MPGA128,
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15
+D1,LED,LEDs:LED-5MM,
16
+R8,330,Discret:R3,
17
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19
+U29,MC68881FN,ref-packages:-PLCC68SOCK,
20
+U4,AM29F040J,ref-packages:-DIL32,
21
+U9,SRAM_512Ko,ref-packages:-DIL32,
22
+U23,DP8422V,ref-packages:-PLCC84SOCK,
23
+U21,PAL16L8,ref-packages:-DIL20,
24
+U16,74LS32,ref-packages:-DIL14,
25
+U34,74LS74,ref-packages:-DIL14,
26
+U12,74LS164,ref-packages:-DIL14,
27
+U32,LM555N,ref-packages:-DIL08,
28
+R53,39K,Discret:R3,
29
+C68,10uF,Capacitors_ThroughHole:C_Radial_D5_L11_P2,
30
+C69,10nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
31
+RESET1,RESET,Buttons_Switches_ThroughHole:SW_PUSH_SMALL,
32
+R54,4K7,Discret:R3,
33
+J1,POWER,Connect:bornier4,
34
+RN2,10K,Resistors_ThroughHole:Resistor_Array_SIP9,
35
+J11,CACHE,Pin_Headers:Pin_Header_Straight_1x02,
36
+J12,MMU,Pin_Headers:Pin_Header_Straight_1x02,
37
+J9,ADDW,Pin_Headers:Pin_Header_Straight_1x02,
38
+J10,WAITIN,Pin_Headers:Pin_Header_Straight_1x02,
39
+C1,330pF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
40
+C43,330pF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
41
+C49,330pF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
42
+C4,330pF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
43
+C61,330pF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
44
+C58,330pF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
45
+C45,10uF,Capacitors_ThroughHole:C_Radial_D5_L11_P2,
46
+C2,10uF,Capacitors_ThroughHole:C_Radial_D5_L11_P2,
47
+C59,10uF,Capacitors_ThroughHole:C_Radial_D5_L11_P2,
48
+C62,10uF,Capacitors_ThroughHole:C_Radial_D5_L11_P2,
49
+C3,10uF,Capacitors_ThroughHole:C_Radial_D5_L11_P2,
50
+C50,10uF,Capacitors_ThroughHole:C_Radial_D5_L11_P2,
51
+C9,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
52
+C13,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
53
+C53,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
54
+C20,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
55
+C37,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
56
+C21,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
57
+C6,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
58
+C40,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
59
+C8,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
60
+D3,LED,LEDs:LED-5MM,
61
+R6,330,Discret:R3,
62
+R17,22,Discret:R3,
63
+R18,22,Discret:R3,
64
+R26,22,Discret:R3,
65
+R25,22,Discret:R3,
66
+R13,10,Discret:R3,
67
+R16,10,Discret:R3,
68
+R15,10,Discret:R3,
69
+R14,10,Discret:R3,
70
+R12,10,Discret:R3,
71
+R9,10,Discret:R3,
72
+R10,10,Discret:R3,
73
+R11,10,Discret:R3,
74
+R5,10,Discret:R3,
75
+R4,10,Discret:R3,
76
+R3,10,Discret:R3,
77
+R22,10,Discret:R3,
78
+R20,10,Discret:R3,
79
+R23,10,Discret:R3,
80
+R19,10,Discret:R3,
81
+C44,1nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
82
+SIMM1,SIMM72PIN,Sockets:SIM72,
83
+R27,22,Discret:R3,
84
+U24,PAL16L8,ref-packages:-DIL20,
85
+J20,CONN_3,Pin_Headers:Pin_Header_Straight_1x03,
86
+R57,10K,Discret:R3,
87
+C79,470uF,Capacitors_ThroughHole:C_Radial_D8_L11.5_P3.5,
88
+C80,10uF,Capacitors_ThroughHole:C_Radial_D5_L11_P2,
89
+K1,CONN_3,Pin_Headers:Pin_Header_Straight_1x03,
90
+C54,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
91
+C38,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
92
+C72,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
93
+C35,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
94
+C74,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
95
+U42,EPM7128-P100,PGA128Adapter:PGA100Adapter,
96
+J19,CONN_5X2,Pin_Headers:Pin_Header_Straight_2x05,
97
+U3,MC68230FN,ref-packages:-PLCC-S52,
98
+U2,WD37C65,ref-packages:-PLCC-S44,
99
+U26,8242KBD,ref-packages:-DIL40,
100
+U28,AY-3-8910,ref-packages:-DIL40,
101
+U7,RTC72421,ref-packages:-DIL18,
102
+U6,DS1210,ref-packages:-DIL08,
103
+U17,74LS245,ref-packages:-DIL20,
104
+U10,74LS245,ref-packages:-DIL20,
105
+U5,74LS139,ref-packages:-DIL16,
106
+U15,MAX232,ref-packages:-DIL16,
107
+U14,MAX232,ref-packages:-DIL16,
108
+J2,CONN_20X2,Pin_Headers:Pin_Header_Straight_2x20,
109
+X5,16MHz,ref-packages:-DIL14,
110
+J3,CONN_17X2,Pin_Headers:Pin_Header_Straight_2x17,
111
+J13,KEYBOARD,mini_din:mini_din-M_DIN6,
112
+J14,MOUSE,mini_din:mini_din-M_DIN6,
113
+J6,DB25,Connect:DB25FC,
114
+RN1,150,Resistors_ThroughHole:Resistor_Array_SIP9,
115
+J5,CONN_8,Pin_Headers:Pin_Header_Straight_1x08,
116
+JA8,DB9,Pin_Headers:Pin_Header_Straight_2x05,
117
+JB8,DB9,Pin_Headers:Pin_Header_Straight_2x05,
118
+JA17,DB9,Pin_Headers:Pin_Header_Straight_2x05,
119
+JB17,DB9,Pin_Headers:Pin_Header_Straight_2x05,
120
+J4,CONN_6,Pin_Headers:Pin_Header_Straight_1x06,
121
+J7,CONN_4,Pin_Headers:Pin_Header_Straight_1x04,
122
+R21,33K,Discret:R3,
123
+U8,MC68681P-PLCC,ref-packages:-PLCC-S44,
124
+C11,10pF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
125
+C12,10pF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
126
+X1,3.6864MHz,Crystals:HC-49V,
127
+C27,10uF,Capacitors_ThroughHole:C_Radial_D5_L11_P2,
128
+C17,10uF,Capacitors_ThroughHole:C_Radial_D5_L11_P2,
129
+C19,10uF,Capacitors_ThroughHole:C_Radial_D5_L11_P2,
130
+C15,10uF,Capacitors_ThroughHole:C_Radial_D5_L11_P2,
131
+C18,10uF,Capacitors_ThroughHole:C_Radial_D5_L11_P2,
132
+C16,10uF,Capacitors_ThroughHole:C_Radial_D5_L11_P2,
133
+C25,10uF,Capacitors_ThroughHole:C_Radial_D5_L11_P2,
134
+C14,10uF,Capacitors_ThroughHole:C_Radial_D5_L11_P2,
135
+FB12,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
136
+FB13,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
137
+FB14,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
138
+FB15,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
139
+FB17,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
140
+FB18,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
141
+FB20,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
142
+FB19,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
143
+FB5,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
144
+FB3,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
145
+FB6,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
146
+FB8,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
147
+FB10,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
148
+FB7,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
149
+FB9,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
150
+FB11,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
151
+R35,1K,Discret:R3,
152
+R41,1K,Discret:R3,
153
+R38,1K,Discret:R3,
154
+J16,CHANNEL_SELECT,Pin_Headers:Pin_Header_Straight_1x04,
155
+R39,10K,Discret:R3,
156
+R40,10K,Discret:R3,
157
+R37,10K,Discret:R3,
158
+R36,10K,Discret:R3,
159
+RV2,5K,diy_pots:R_TRIM_3386P,
160
+RV1,5K,diy_pots:R_TRIM_3386P,
161
+C48,270pF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
162
+C41,270pF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
163
+C52,10uF,Capacitors_ThroughHole:C_Radial_D5_L11_P2,
164
+C51,10uF,Capacitors_ThroughHole:C_Radial_D5_L11_P2,
165
+R24,10K,Discret:R3,
166
+B1,BATTERY,sn2032:sn2032-SN2032,
167
+C22,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
168
+C30,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
169
+C47,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
170
+C26,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
171
+C42,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
172
+C70,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
173
+C46,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
174
+C60,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
175
+C63,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
176
+C10,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
177
+C73,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
178
+C7,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
179
+D2,LED,LEDs:LED-5MM,
180
+R7,330,Discret:R3,
181
+U13,74LS93,ref-packages:-DIL14,
182
+P2,CONN_1,Mounting_Holes:MountingHole_4.3mm_M4_ISO7380_Pad,
183
+P3,CONN_1,Mounting_Holes:MountingHole_4.3mm_M4_ISO7380_Pad,
184
+P4,CONN_1,Mounting_Holes:MountingHole_4.3mm_M4_ISO7380_Pad,
185
+P5,CONN_1,Mounting_Holes:MountingHole_4.3mm_M4_ISO7380_Pad,
186
+FB4,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
187
+FB16,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
188
+J23,CONN_6,Pin_Headers:Pin_Header_Straight_1x06,
189
+J22,CONN_6,Pin_Headers:Pin_Header_Straight_1x06,
190
+P6,CONN_1,Mounting_Holes:MountingHole_4.3mm_M4_ISO7380_Pad,
191
+P7,CONN_1,Mounting_Holes:MountingHole_4.3mm_M4_ISO7380_Pad,
192
+P8,CONN_1,Mounting_Holes:MountingHole_4.3mm_M4_ISO7380_Pad,
193
+P9,CONN_1,Mounting_Holes:MountingHole_4.3mm_M4_ISO7380_Pad,
194
+P10,CONN_1,Mounting_Holes:MountingHole_4.3mm_M4_ISO7380_Pad,
195
+P11,CONN_1,Mounting_Holes:MountingHole_4.3mm_M4_ISO7380_Pad,
196
+J24,JUMPER,Pin_Headers:Pin_Header_Straight_1x02,
197
+J15,STEREO_JACK,stereo_jack:stereo_jack,
198
+U31,74LS241,ref-packages:-DIL20,
199
+J25,JUMPER,Pin_Headers:Pin_Header_Straight_1x02,
200
+J26,JUMPER,Pin_Headers:Pin_Header_Straight_1x02,
201
+U37,S1D13505,PGA128Adapter:PGA128Adapter,
202
+X4,40MHz,ref-packages:-DIL14,
203
+J18,DB15,HD15_B:HD15_B-HD15F,
204
+FB23,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
205
+FB24,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
206
+FB25,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
207
+R52,39,Discret:R3,
208
+R51,39,Discret:R3,
209
+FB26,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
210
+FB27,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
211
+R50,150,Discret:R3,
212
+R49,150,Discret:R3,
213
+R46,150,Discret:R3,
214
+Q1,2N2222A,Transistors_OldSowjetAera:OldSowjetaera_Transistor_Type-II_SmallPads,
215
+R42,140,Discret:R3,
216
+R47,1K,Discret:R3,
217
+R44,2.5K,Discret:R3,
218
+D9,1N4148,Diodes_ThroughHole:Diode_DO-35_SOD27_Horizontal_RM10,
219
+D6,1N4148,Diodes_ThroughHole:Diode_DO-35_SOD27_Horizontal_RM10,
220
+D10,1N4148,Diodes_ThroughHole:Diode_DO-35_SOD27_Horizontal_RM10,
221
+D7,1N4148,Diodes_ThroughHole:Diode_DO-35_SOD27_Horizontal_RM10,
222
+D8,1N4148,Diodes_ThroughHole:Diode_DO-35_SOD27_Horizontal_RM10,
223
+C24,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
224
+C57,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
225
+C23,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
226
+C71,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
227
+C66,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
228
+C64,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
229
+C55,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
230
+C65,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
231
+C56,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
232
+C67,1uF,Capacitors_ThroughHole:C_Radial_D5_L11_P2,
233
+FB22,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
234
+FB21,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
235
+C5,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
236
+U22,RTL8019AS,PGA128Adapter:PGA100Adapter,
237
+R34,27K,Discret:R3,
238
+R28,1M,Discret:R3,
239
+X2,20MHz,Crystals:HC-49V,
240
+C29,10pF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
241
+C32,10pF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
242
+D4,TX LED,LEDs:LED-5MM,
243
+R33,1K,Discret:R3,
244
+R31,10K,Discret:R3,
245
+R29,1K,Discret:R3,
246
+R30,1K,Discret:R3,
247
+R32,200,Discret:R3,
248
+C34,10nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
249
+C33,10nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
250
+C36,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
251
+FB2,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
252
+FB1,-,Choke_Axial_ThroughHole:Choke_Horizontal_RM10mm,
253
+C28,1uF,Capacitors_ThroughHole:C_Radial_D5_L11_P2,
254
+C31,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
255
+C39,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
256
+J21,JUMPER,Pin_Headers:Pin_Header_Straight_1x02,
257
+R43,10K,Discret:R3,
258
+R45,10K,Discret:R3,
259
+R48,10K,Discret:R3,
260
+J8,JUMPER,Pin_Headers:Pin_Header_Straight_1x02,
261
+J17,JUMPER,Pin_Headers:Pin_Header_Straight_1x02,
262
+U38,AS4C1M16E5-SOJ42,libcms:SOJ4242,
263
+D5,1N4148,Diodes_ThroughHole:Diode_DO-35_SOD27_Horizontal_RM10,
264
+P1,HR911105A,HR911105a:HR911105a,
265
+P12,CONN_10X2,ATX_NON_90DEG:ATX_NON_90DEG,
266
+P13,CONN_8,Pin_Headers:Pin_Header_Straight_1x08,
267
+SW1,POWER,Buttons_Switches_ThroughHole:SW_PUSH_SMALL,
268
+U40,74HCT14,ref-packages:-DIL14,
269
+R58,10k,Discret:R3,
270
+C76,10uF,Capacitors_ThroughHole:C_Radial_D5_L11_P2,
271
+D13,1N4148,Diodes_ThroughHole:Diode_DO-35_SOD27_Horizontal_RM10,
272
+D12,1N4148,Diodes_ThroughHole:Diode_DO-35_SOD27_Horizontal_RM10,
273
+C75,1uF,Capacitors_ThroughHole:C_Radial_D5_L11_P2,
274
+U41,74HCT74,ref-packages:-DIL14,
275
+R60,10k,Discret:R3,
276
+R59,470,Discret:R3,
277
+P14,POWER_SW,Pin_Headers:Pin_Header_Straight_1x02,
278
+C77,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,
279
+C78,100nF,Capacitors_ThroughHole:C_Rect_L7_W2_P5,

+ 68159
- 0
Jackalope.dsn
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+ 48065
- 0
Jackalope.kicad_pcb
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+ 6310
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+ 112
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Jackalope.pro View File

@@ -0,0 +1,112 @@
1
+update=4/20/2017 4:30:36 PM
2
+version=1
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+last_client=kicad
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+[cvpcb]
5
+version=1
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+NetIExt=net
7
+[cvpcb/libraries]
8
+EquName1=devcms
9
+[pcbnew]
10
+version=1
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+LastNetListRead=
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+UseCmpFile=1
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+PadDrill=0.600000000000
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+PadDrillOvalY=0.600000000000
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+PadSizeH=1.500000000000
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+PadSizeV=1.500000000000
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+PcbTextSizeV=1.500000000000
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+PcbTextSizeH=1.500000000000
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+PcbTextThickness=0.300000000000
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+ModuleTextSizeV=1.000000000000
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+ModuleTextSizeH=1.000000000000
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+ModuleTextSizeThickness=0.150000000000
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+SolderMaskClearance=0.000000000000
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+SolderMaskMinWidth=0.000000000000
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+DrawSegmentWidth=0.200000000000
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+BoardOutlineThickness=0.100000000000
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+ModuleOutlineThickness=0.150000000000
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+[pcbnew/libraries]
29
+LibDir=
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+LibName1=sockets
31
+LibName2=connect
32
+LibName3=discret
33
+LibName4=pin_array
34
+LibName5=divers
35
+LibName6=smd_capacitors
36
+LibName7=smd_resistors
37
+LibName8=smd_crystal&oscillator
38
+LibName9=smd_dil
39
+LibName10=smd_transistors
40
+LibName11=libcms
41
+LibName12=display
42
+LibName13=led
43
+LibName14=dip_sockets
44
+LibName15=pga_sockets
45
+LibName16=valves
46
+[general]
47
+version=1
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+[schematic_editor]
49
+version=1
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+PageLayoutDescrFile=
51
+PlotDirectoryName=
52
+SubpartIdSeparator=0
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+SubpartFirstId=65
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+NetFmtName=Pcbnew
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+SpiceForceRefPrefix=0
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+SpiceUseNetNumbers=0
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+LabSize=60
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+[eeschema]
59
+version=1
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+LibDir=
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+[eeschema/libraries]
62
+LibName1=power
63
+LibName2=device
64
+LibName3=transistors
65
+LibName4=conn
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+LibName5=linear
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+LibName6=regul
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+LibName7=74xx
69
+LibName8=cmos4000
70
+LibName9=adc-dac
71
+LibName10=memory
72
+LibName11=xilinx
73
+LibName12=special
74
+LibName13=microcontrollers
75
+LibName14=dsp
76
+LibName15=microchip
77
+LibName16=analog_switches
78
+LibName17=motorola
79
+LibName18=texas
80
+LibName19=intel
81
+LibName20=audio
82
+LibName21=interface
83
+LibName22=digital-audio
84
+LibName23=philips
85
+LibName24=display
86
+LibName25=cypress
87
+LibName26=siliconi
88
+LibName27=opto
89
+LibName28=atmel
90
+LibName29=contrib
91
+LibName30=valves
92
+LibName31=micro-mc68000
93
+LibName32=o_ttl
94
+LibName33=micro-intel
95
+LibName34=am29-memory
96
+LibName35=DP8422V
97
+LibName36=simm72pin
98
+LibName37=N8VEM-KiCAD
99
+LibName38=8242kbd
100
+LibName39=wd37c65
101
+LibName40=ay-3-8910
102
+LibName41=RTC72421
103
+LibName42=conn_17x2
104
+LibName43=mini_din
105
+LibName44=mc68681-PLCC
106
+LibName45=s1d13505
107
+LibName46=AS4C1M16E5
108
+LibName47=rtl8019as
109
+LibName48=74HCxx_custom
110
+LibName49=altera
111
+LibName50=opendous
112
+LibName51=tm-kicad-lib

+ 172
- 0
Jackalope.rules View File

@@ -0,0 +1,172 @@
1
+
2
+(rules PCB Jackalope
3
+  (snap_angle 
4
+    fortyfive_degree
5
+  )
6
+  (autoroute_settings
7
+    (fanout off)
8
+    (autoroute on)
9
+    (postroute on)
10
+    (vias on)
11
+    (via_costs 50)
12
+    (plane_via_costs 5)
13
+    (start_ripup_costs 100)
14
+    (start_pass_no 9295)
15
+    (layer_rule F.Cu
16
+      (active on)
17
+      (preferred_direction horizontal)
18
+      (preferred_direction_trace_costs 1.0)
19
+      (against_preferred_direction_trace_costs 2.2)
20
+    )
21
+    (layer_rule B.Cu
22
+      (active on)
23
+      (preferred_direction vertical)
24
+      (preferred_direction_trace_costs 1.0)
25
+      (against_preferred_direction_trace_costs 1.8)
26
+    )
27
+  )
28
+  (rule
29
+    (width 203.2)
30
+    (clear 203.4)
31
+    (clear 101.6 (type smd_to_turn_gap))
32
+    (clear 50.8 (type smd_smd))
33
+  )
34
+  (padstack "Via[0-1]_600:400_um"
35
+    (shape
36
+      (circle F.Cu 600.0 0.0 0.0)
37
+    )
38
+    (shape
39
+      (circle B.Cu 600.0 0.0 0.0)
40
+    )
41
+    (attach off)
42
+  )
43
+  (via 
44
+    "Via[0-1]_600:400_um" "Via[0-1]_600:400_um" default
45
+  )
46
+  (via 
47
+    "Via[0-1]_600:400_um-kicad_default" "Via[0-1]_600:400_um" default
48
+  )
49
+  (via 
50
+    "Via[0-1]_600:400_um-power" "Via[0-1]_600:400_um" default
51
+  )
52
+  (via_rule
53
+    default "Via[0-1]_600:400_um"
54
+  )
55
+  (via_rule
56
+    "kicad_default" "Via[0-1]_600:400_um-kicad_default"
57
+  )
58
+  (via_rule
59
+    power "Via[0-1]_600:400_um-power"
60
+  )
61
+  (class default
62
+    (clearance_class default)
63
+    (via_rule default)
64
+    (rule
65
+      (width 203.2)
66
+    )
67
+    (circuit 
68
+      (use_layer F.Cu B.Cu)
69
+    )
70
+  )
71
+  (class "kicad_default"
72
+    "Net-(C11-Pad1)" "Net-(C12-Pad1)" "Net-(C14-Pad2)" "Net-(C15-Pad2)" "Net-(C16-Pad1)" "Net-(C16-Pad2)" "Net-(C17-Pad1)" "Net-(C17-Pad2)"
73
+    "Net-(C18-Pad1)" "Net-(C18-Pad2)" "Net-(C19-Pad1)" "Net-(C25-Pad1)" "Net-(C27-Pad1)" "Net-(C27-Pad2)" "Net-(C29-Pad2)" "Net-(C32-Pad2)"
74
+    "Net-(C33-Pad1)" "Net-(C34-Pad1)" "Net-(C41-Pad1)" "Net-(C44-Pad1)" "Net-(C48-Pad1)" "Net-(C51-Pad2)" "Net-(C52-Pad2)" "Net-(C68-Pad1)"
75
+    "Net-(C69-Pad1)" "Net-(D1-Pad1)" "Net-(D1-Pad2)" "Net-(D2-Pad1)" "Net-(D2-Pad2)" "Net-(D3-Pad1)" "Net-(D4-Pad1)" "Net-(D4-Pad2)"
76
+    RED GREEN BLUE "Net-(D11-Pad1)" "Net-(D11-Pad2)" "Net-(FB3-Pad1)" "Net-(FB3-Pad2)" "Net-(FB5-Pad1)"
77
+    "Net-(FB5-Pad2)" "Net-(FB6-Pad1)" "Net-(FB6-Pad2)" "Net-(FB7-Pad1)" "Net-(FB8-Pad1)" "Net-(FB8-Pad2)" "Net-(FB9-Pad1)" "Net-(FB9-Pad2)"
78
+    "Net-(FB10-Pad1)" "Net-(FB10-Pad2)" "Net-(FB11-Pad1)" "Net-(FB11-Pad2)" "Net-(FB12-Pad1)" "Net-(FB12-Pad2)" "Net-(FB13-Pad1)" "Net-(FB13-Pad2)"
79
+    "Net-(FB14-Pad1)" "Net-(FB14-Pad2)" "Net-(FB15-Pad1)" "Net-(FB15-Pad2)" "Net-(FB17-Pad1)" "Net-(FB17-Pad2)" "Net-(FB18-Pad1)" "Net-(FB19-Pad1)"
80
+    "Net-(FB19-Pad2)" "Net-(FB20-Pad1)" "Net-(FB20-Pad2)" "Net-(FB23-Pad2)" "Net-(FB24-Pad2)" "Net-(FB25-Pad2)" "Net-(FB26-Pad1)" "Net-(FB26-Pad2)"
81
+    "Net-(FB27-Pad1)" "Net-(FB27-Pad2)" *MRESET BD31 BD16 BD30 BD17 BD29
82
+    BD18 BD28 BD19 BD27 BD20 BD26 BD21 BD25
83
+    BD22 BD24 BD23 "Net-(J2-Pad20)" "Net-(J2-Pad21)" *WR *RD "Net-(J2-Pad28)"
84
+    "Net-(J2-Pad29)" "Net-(J2-Pad31)" "Net-(J2-Pad32)" BA1 "Net-(J2-Pad34)" BA0 BA2 "Net-(J2-Pad37)"
85
+    "Net-(J2-Pad38)" "Net-(J3-Pad2)" "Net-(J3-Pad4)" "Net-(J3-Pad16)" "Net-(J3-Pad8)" "Net-(J3-Pad10)" "Net-(J3-Pad12)" "Net-(J3-Pad14)"
86
+    "Net-(J3-Pad18)" "Net-(J3-Pad20)" "Net-(J3-Pad22)" "Net-(J3-Pad24)" "Net-(J3-Pad26)" "Net-(J3-Pad28)" "Net-(J3-Pad30)" "Net-(J3-Pad32)"
87
+    "Net-(J3-Pad34)" "Net-(J4-Pad1)" "Net-(J4-Pad2)" "Net-(J4-Pad3)" "Net-(J4-Pad4)" "Net-(J4-Pad5)" "Net-(J4-Pad6)" "Net-(J5-Pad1)"
88
+    "Net-(J5-Pad2)" "Net-(J5-Pad3)" "Net-(J5-Pad4)" "Net-(J5-Pad5)" "Net-(J5-Pad6)" "Net-(J5-Pad7)" "Net-(J5-Pad8)" PPSTROBE
89
+    "Net-(J6-Pad2)" "Net-(J6-Pad3)" "Net-(J6-Pad4)" "Net-(J6-Pad5)" "Net-(J6-Pad6)" "Net-(J6-Pad7)" "Net-(J6-Pad8)" "Net-(J6-Pad9)"
90
+    PPACK "Net-(J6-Pad11)" "Net-(J6-Pad12)" "Net-(J6-Pad13)" "Net-(J6-Pad14)" PPSEL PPINIT PPERROR
91
+    "Net-(J7-Pad1)" "Net-(J7-Pad2)" "Net-(J7-Pad3)" "Net-(J7-Pad4)" *ADDW *WAITIN *CDIS *MMUDIS
92
+    "Net-(J13-Pad1)" "Net-(J13-Pad2)" "Net-(J13-Pad6)" "Net-(J13-Pad8)" "Net-(J14-Pad1)" "Net-(J14-Pad2)" "Net-(J14-Pad6)" "Net-(J14-Pad8)"
93
+    "Net-(J16-Pad1)" "Net-(J16-Pad2)" "Net-(J16-Pad3)" "Net-(J16-Pad4)" "Net-(J18-Pad4)" "Net-(J18-Pad9)" "Net-(J18-Pad11)" "Net-(J18-Pad12)"
94
+    "Net-(J18-Pad15)" A26 A27 A28 A29 A30 A31 "Net-(J20-Pad1)"
95
+    "Net-(J20-Pad2)" "Net-(J21-Pad1)" "Net-(JA8-Pad1)" "Net-(JA8-Pad2)" "Net-(JA8-Pad3)" "Net-(JA8-Pad4)" "Net-(JA8-Pad9)" "Net-(JA8-Pad8)"
96
+    "Net-(JA8-Pad7)" "Net-(JA8-Pad6)" "Net-(JB8-Pad1)" "Net-(JB8-Pad2)" "Net-(JB8-Pad3)" "Net-(JB8-Pad4)" "Net-(JB8-Pad9)" "Net-(JB8-Pad8)"
97
+    "Net-(JB8-Pad7)" "Net-(JB8-Pad6)" "Net-(NMI1-Pad1)" "Net-(NMI1-Pad3)" "Net-(P1-Pad6)" "Net-(P1-Pad3)" "Net-(P1-Pad1)" "Net-(Q1-Pad2)"
98
+    "Net-(Q1-Pad1)" "Net-(Q1-Pad3)" "Net-(R3-Pad1)" "Net-(R3-Pad2)" "Net-(R4-Pad1)" "Net-(R4-Pad2)" "Net-(R5-Pad1)" "Net-(R5-Pad2)"
99
+    "Net-(R9-Pad1)" "Net-(R9-Pad2)" "Net-(R10-Pad1)" "Net-(R10-Pad2)" "Net-(R11-Pad1)" "Net-(R11-Pad2)" "Net-(R12-Pad1)" "Net-(R12-Pad2)"
100
+    "Net-(R13-Pad1)" "Net-(R13-Pad2)" "Net-(R14-Pad1)" "Net-(R14-Pad2)" "Net-(R15-Pad1)" "Net-(R15-Pad2)" "Net-(R16-Pad1)" "Net-(R16-Pad2)"
101
+    "Net-(R17-Pad1)" "Net-(R17-Pad2)" "Net-(R18-Pad1)" "Net-(R18-Pad2)" "Net-(R19-Pad1)" "Net-(R19-Pad2)" "Net-(R20-Pad1)" "Net-(R20-Pad2)"
102
+    "Net-(R22-Pad1)" "Net-(R22-Pad2)" "Net-(R23-Pad1)" "Net-(R23-Pad2)" "Net-(R25-Pad1)" "Net-(R25-Pad2)" "Net-(R26-Pad1)" "Net-(R26-Pad2)"
103
+    "Net-(R27-Pad1)" "Net-(R27-Pad2)" "Net-(R31-Pad1)" "Net-(R31-Pad2)" "Net-(R34-Pad1)" "Net-(R39-Pad1)" "Net-(R51-Pad2)" "Net-(R52-Pad2)"
104
+    DS "Net-(RN1-Pad2)" "Net-(RN1-Pad3)" "Net-(RN1-Pad9)" "Net-(RN1-Pad10)" "Net-(RN2-Pad6)" "Net-(RN2-Pad7)" "Net-(RN2-Pad8)"
105
+    "Net-(RN2-Pad9)" "Net-(RN2-Pad10)" "Net-(RN3-Pad2)" "*IRQ_NET" "*IRQ_IDE" "*IRQ_SER" "*IRQ_KEYB" "*IRQ_PAR"
106
+    "*IRQ_FDC" "Net-(RN3-Pad9)" "Net-(RN3-Pad10)" *HALT *BGACK *BR *CIIN *AVEC
107
+    *CBACK "Net-(RN4-Pad8)" "Net-(RN4-Pad9)" "Net-(RN4-Pad10)" D0 D16 D1 D17
108
+    D2 D18 D3 D19 "Net-(SIMM1-Pad11)" D4 D20 D5
109
+    D21 D6 D22 D7 D23 "Net-(SIMM1-Pad29)" "Net-(SIMM1-Pad35)" "Net-(SIMM1-Pad36)"
110
+    "Net-(SIMM1-Pad37)" "Net-(SIMM1-Pad38)" "Net-(SIMM1-Pad46)" D8 D24 D9 D25 D10
111
+    D26 D11 D27 D12 D28 D29 D13 D30
112
+    D14 D31 D15 "Net-(SIMM1-Pad66)" "Net-(SIMM1-Pad67)" "Net-(SIMM1-Pad68)" "Net-(SIMM1-Pad69)" "Net-(SIMM1-Pad70)"
113
+    "Net-(SIMM1-Pad71)" *AS "Net-(U1-Pad6)" *STATUS "Net-(U2-Pad3)" "Net-(U2-Pad6)" "Net-(U2-Pad15)" "Net-(U11-Pad9)"
114
+    "Net-(U2-Pad18)" "Net-(U2-Pad19)" MRESET "Net-(U2-Pad22)" "Net-(U2-Pad25)" 16MHz "Net-(U2-Pad38)" BA4
115
+    BA3 "Net-(U3-Pad38)" "Net-(U3-Pad40)" "Net-(U3-Pad41)" 8MHz "*CS_PAR" "*DTACK_PAR" A18
116
+    A16 A15 A12 A7 A6 A5 A4 A3
117
+    A2 A1 A0 "*CS_ROM" A10 A11 A9 A8
118
+    A13 A14 A17 "*CS_FDC" "Net-(U5-Pad7)" "Net-(U5-Pad9)" "Net-(U5-Pad10)" BA7
119
+    "*CS_IDE" "Net-(U6-Pad1)" "Net-(B1-Pad1)" "*CS_RTC" "Net-(U6-Pad6)" "Net-(U7-Pad1)" "Net-(U7-Pad16)" "Net-(U7-Pad17)"
120
+    "*DTACK_SER" "*CS_SER" "*CS_SRAM" *IOEN "Net-(U11-Pad1)" "Net-(U11-Pad12)" "Net-(U11-Pad13)" "Net-(U12-Pad3)"
121
+    DELAY160NS DELAY240NS "Net-(U12-Pad6)" "Net-(U12-Pad8)" "Net-(U12-Pad10)" "Net-(U12-Pad11)" "Net-(U12-Pad12)" DELAY640NS
122
+    "Net-(U13-Pad8)" "Net-(U13-Pad9)" 1MHz "Net-(U16-Pad1)" "Net-(U16-Pad2)" "Net-(U16-Pad5)" "Net-(U16-Pad10)" "Net-(U16-Pad13)"
123
+    "*CS_KEYB" "DTACK_NET" "*DSACK0_COP" *DSACK0 "*DSACK1_VID" "*DSACK1_COP" "*CS_VIDR" P24
124
+    P25 BDIR BC1 "*CS_VIDEO" *DSACK1 "Net-(U20-Pad14)" "Net-(U20-Pad15)" SIZ0
125
+    SIZ1 "*CS_ENET" "Net-(U21-Pad11)" "Net-(U21-Pad12)" "Net-(U21-Pad13)" "Net-(U21-Pad14)" "Net-(U21-Pad15)" "*CS_DRAM"
126
+    "Net-(U21-Pad18)" "Net-(U22-Pad1)" "Net-(U22-Pad2)" "Net-(U22-Pad3)" "Net-(U22-Pad60)" "Net-(U22-Pad87)" "Net-(U22-Pad88)" "Net-(U22-Pad90)"
127
+    "Net-(U22-Pad91)" "Net-(U22-Pad92)" "Net-(U22-Pad93)" "Net-(U22-Pad94)" "Net-(U22-Pad95)" "Net-(U22-Pad97)" "Net-(U22-Pad98)" "Net-(U22-Pad99)"
128
+    "Net-(U22-Pad100)" A19 A20 A23 A21 A24 A22 "Net-(U23-Pad41)"
129
+    "Net-(U23-Pad62)" "Net-(U23-Pad72)" "Net-(U23-Pad76)" "Net-(U23-Pad77)" "Net-(U23-Pad78)" "Net-(U24-Pad6)" "Net-(U24-Pad9)" *STERM
130
+    "Net-(U24-Pad13)" "Net-(U24-Pad14)" "Net-(U24-Pad15)" "Net-(U24-Pad16)" *MLCLK "Net-(U25-Pad1)" "Net-(U25-Pad4)" *DS
131
+    "Net-(U25-Pad9)" "Net-(U25-Pad11)" "Net-(U25-Pad13)" "Net-(U26-Pad11)" "Net-(U26-Pad21)" "Net-(U26-Pad22)" "Net-(U26-Pad29)" "Net-(U26-Pad30)"
132
+    "Net-(U26-Pad31)" "Net-(U26-Pad32)" "Net-(U26-Pad33)" "Net-(U26-Pad34)" "Net-(U28-Pad2)" "Net-(U28-Pad5)" "Net-(U28-Pad6)" "Net-(U28-Pad14)"
133
+    "Net-(U28-Pad26)" "Net-(U28-Pad39)" "Net-(U30-PadB01)" "Net-(U30-PadB02)" A25 FC1 "Net-(U30-PadC02)" FC2
134
+    FC0 "Net-(U30-PadD03)" "Net-(U30-PadE13)" "Net-(U30-PadJ13)" "Net-(U30-PadK01)" "Net-(U30-PadM01)" "Net-(U30-PadM02)" "Net-(U34-Pad5)"
135
+    "Net-(U34-Pad12)" "Net-(U35-Pad3)" "Net-(U35-Pad4)" "Net-(U35-Pad5)" "Net-(U35-Pad6)" "Net-(U35-Pad10)" "Net-(U35-Pad11)" "Net-(U35-Pad12)"
136
+    "Net-(U37-Pad13)" "Net-(U37-Pad34)" "Net-(U37-Pad35)" "Net-(U37-Pad36)" "Net-(U37-Pad37)" "Net-(U37-Pad38)" "Net-(U37-Pad40)" "Net-(U37-Pad41)"
137
+    "Net-(U37-Pad42)" "Net-(U37-Pad43)" "Net-(U37-Pad44)" "Net-(U37-Pad46)" "Net-(U37-Pad48)" "Net-(U37-Pad49)" "Net-(U37-Pad51)" "Net-(U37-Pad52)"
138
+    "Net-(U37-Pad53)" "Net-(U37-Pad54)" "Net-(U37-Pad56)" "Net-(U37-Pad58)" "Net-(U37-Pad60)" "Net-(U37-Pad61)" "Net-(U37-Pad62)" "Net-(U37-Pad63)"
139
+    "Net-(U37-Pad64)" "Net-(U37-Pad65)" "Net-(U37-Pad66)" "Net-(U37-Pad67)" "Net-(X3-Pad1)" "Net-(X3-Pad2)" "Net-(X3-Pad3)" "Net-(X3-Pad12)"
140
+    "Net-(X3-Pad13)" "Net-(X4-Pad1)" "Net-(X4-Pad2)" "Net-(X4-Pad3)" "Net-(X4-Pad12)" "Net-(X4-Pad13)" "Net-(X5-Pad1)" "Net-(X5-Pad2)"
141
+    "Net-(X5-Pad3)" "Net-(X5-Pad12)" "Net-(X5-Pad13)" "Net-(FB16-Pad2)" "Net-(FB4-Pad1)" "Net-(J22-Pad2)" "Net-(J22-Pad4)" "Net-(J22-Pad5)"
142
+    "Net-(J22-Pad6)" "Net-(J23-Pad2)" "Net-(J23-Pad4)" "Net-(J23-Pad5)" "Net-(J23-Pad6)" "Net-(R43-Pad2)" "Net-(R45-Pad2)" "Net-(R48-Pad2)"
143
+    *IPL2 *IPL1 *IPL0 "Net-(C75-Pad1)" "Net-(C76-Pad1)" "PWR_ON" PG "Net-(P13-Pad8)"
144
+    "Net-(P14-Pad2)" "Net-(U40-Pad2)" "Net-(U40-Pad4)" "Net-(U40-Pad6)" "Net-(U40-Pad8)" "Net-(U40-Pad10)" "Net-(U40-Pad12)" "Net-(U41-Pad2)"
145
+    "Net-(J8-Pad1)" "Net-(J8-Pad2)" "Net-(J17-Pad1)" "Net-(J17-Pad2)" "Net-(U42-Pad39)" "Net-(U42-Pad65)" "Net-(U42-Pad48)" "Net-(U42-Pad42)"
146
+    "Net-(U42-Pad71)" "Net-(U42-Pad22)" "Net-(U42-Pad77)" "Net-(U42-Pad90)" "Net-(U42-Pad92)" "Net-(J2-Pad27)" TCK TDO
147
+    TMS "Net-(J19-Pad6)" "Net-(U21-Pad6)" "Net-(U21-Pad7)" "Net-(U21-Pad8)" "Net-(U21-Pad9)" "Net-(U21-Pad16)" "Net-(U21-Pad17)"
148
+    "Net-(U21-Pad19)" "*CS_COPROC" TDI "Net-(J19-Pad7)" "Net-(J19-Pad8)" "Net-(U42-Pad49)" "Net-(U42-Pad43)" "Net-(U42-Pad33)"
149
+    "Net-(U42-Pad54)" "Net-(U42-Pad24)" "Net-(U42-Pad82)" "/Jackalope-Video Ethernet/ETH_AVCC" "/Jackalope-Video Ethernet/ETH_AGND" "/Jackalope-Video Ethernet/VID_AVCC" "/Jackalope-Video Ethernet/VID_AGND" "Net-(C80-Pad1)"
150
+    "/Jackalope-CPU Memory/CLK25M" "Net-(J1-Pad1)" "Net-(P1-Pad2)" "Net-(P1-Pad7)" "Net-(P1-Pad12)" "Net-(P1-Pad11)" "Net-(P1-Pad9)" "Net-(P1-Pad10)"
151
+    "Net-(J22-Pad3)" "Net-(J23-Pad3)" "Net-(K1-Pad2)" "Net-(U31-Pad5)" "Net-(U31-Pad7)"
152
+    (clearance_class default)
153
+    (via_rule kicad_default)
154
+    (rule
155
+      (width 203.2)
156
+    )
157
+    (circuit 
158
+      (use_layer F.Cu B.Cu)
159
+    )
160
+  )
161
+  (class power
162
+    GND +5V 5VSB +3V3 "-12V" "-5V" +12V
163
+    (clearance_class default)
164
+    (via_rule power)
165
+    (rule
166
+      (width 609.6)
167
+    )
168
+    (circuit 
169
+      (use_layer F.Cu B.Cu)
170
+    )
171
+  )
172
+)

+ 98
- 0
Jackalope.sch View File

@@ -0,0 +1,98 @@
1
+EESchema Schematic File Version 2
2
+LIBS:power
3
+LIBS:device
4
+LIBS:transistors
5
+LIBS:conn
6
+LIBS:linear
7
+LIBS:regul
8
+LIBS:74xx
9
+LIBS:cmos4000
10
+LIBS:adc-dac
11
+LIBS:memory
12
+LIBS:xilinx
13
+LIBS:special
14
+LIBS:microcontrollers
15
+LIBS:dsp
16
+LIBS:microchip
17
+LIBS:analog_switches
18
+LIBS:motorola
19
+LIBS:texas
20
+LIBS:intel
21
+LIBS:audio
22
+LIBS:interface
23
+LIBS:digital-audio
24
+LIBS:philips
25
+LIBS:display
26
+LIBS:cypress
27
+LIBS:siliconi
28
+LIBS:opto
29
+LIBS:atmel
30
+LIBS:contrib
31
+LIBS:valves
32
+LIBS:micro-mc68000
33
+LIBS:o_ttl
34
+LIBS:micro-intel
35
+LIBS:am29-memory
36
+LIBS:DP8422V
37
+LIBS:simm72pin
38
+LIBS:N8VEM-KiCAD
39
+LIBS:8242kbd
40
+LIBS:wd37c65
41
+LIBS:ay-3-8910
42
+LIBS:RTC72421
43
+LIBS:conn_17x2
44
+LIBS:mini_din
45
+LIBS:mc68681-PLCC
46
+LIBS:s1d13505
47
+LIBS:AS4C1M16E5
48
+LIBS:rtl8019as
49
+LIBS:74HCxx_custom
50
+LIBS:altera
51
+LIBS:opendous
52
+LIBS:tm-kicad-lib
53
+LIBS:Jackalope-cache
54
+EELAYER 25 0
55
+EELAYER END
56
+$Descr A4 11693 8268
57
+encoding utf-8
58
+Sheet 1 6
59
+Title ""
60
+Date ""
61
+Rev ""
62
+Comp ""
63
+Comment1 ""
64
+Comment2 ""
65
+Comment3 ""
66
+Comment4 ""
67
+$EndDescr
68
+$Sheet
69
+S 3200 1700 2400 1750
70
+U 5754915B
71
+F0 "Jackalope-CPU Memory" 60
72
+F1 "Jackalope-CPU Memory.sch" 60
73
+$EndSheet
74
+$Sheet
75
+S 5900 1700 2400 1750
76
+U 5754931B
77
+F0 "Jackalope-Glue Logic" 60
78
+F1 "Jackalope-Glue Logic.sch" 60
79
+$EndSheet
80
+$Sheet
81
+S 3200 3700 2400 1750
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+X RFU_1 27 -650 2350 300 R 60 60 1 1 B
427
+X A10 37 -650 1350 300 R 60 60 1 1 B
428
+X sMEMR 47 -650 350 300 R 60 60 1 1 B
429
+X TMA2* 57 -650 -650 300 R 60 60 1 1 B
430
+X PHANTOM* 67 -650 -1650 300 R 60 60 1 1 B
431
+X pWR* 77 -650 -2650 300 R 60 60 1 1 B
432
+X A11 87 -650 -3650 300 R 60 60 1 1 B
433
+X sWO* 97 -650 -4650 300 R 60 60 1 1 B
434
+X SDSB* 18 -650 3250 300 R 60 60 1 1 B
435
+X RFU_2 28 -650 2250 300 R 60 60 1 1 B
436
+X DO4_ED4 38 -650 1250 300 R 60 60 1 1 B
437
+X sHLTA 48 -650 250 300 R 60 60 1 1 B
438
+X sXTRQ* 58 -650 -750 300 R 60 60 1 1 B
439
+X MWRT 68 -650 -1750 300 R 60 60 1 1 B
440
+X pDBIN 78 -650 -2750 300 R 60 60 1 1 B
441
+X DO2_ED2 88 -650 -3750 300 R 60 60 1 1 B
442
+X ERROR* 98 -650 -4750 300 R 60 60 1 1 B
443
+X CDSB* 19 -650 3150 300 R 60 60 1 1 B
444
+X A5 29 -650 2150 300 R 60 60 1 1 B
445
+X DO5_ED5 39 -650 1150 300 R 60 60 1 1 B
446
+X CLOCK 49 -650 150 300 R 60 60 1 1 B
447
+X A19 59 -650 -850 300 R 60 60 1 1 B
448
+X RFU3 69 -650 -1850 300 R 60 60 1 1 B
449
+X A0 79 -650 -2850 300 R 60 60 1 1 B
450
+X DO3_ED3 89 -650 -3850 300 R 60 60 1 1 B
451
+X POC* 99 -650 -4850 300 R 60 60 1 1 B
452
+X 0_V5 100 -650 -4950 300 R 60 60 1 1 W
453
+ENDDRAW
454
+ENDDEF
455
+#
456
+# S100_MALE
457
+#
458
+DEF S100_MALE P 0 40 Y Y 1 F N
459
+F0 "P" 0 5050 60 H V C CNN
460
+F1 "S100_MALE" 450 0 60 V V C CNN
461
+DRAW
462
+S -350 5000 350 -5000 0 1 0 N
463
+X +8_V 1 -650 4950 300 R 60 60 1 1 W
464
+X +16_V 2 -650 4850 300 R 60 60 1 1 W
465
+X XRDY 3 -650 4750 300 R 60 60 1 1 B
466
+X VIO* 4 -650 4650 300 R 60 60 1 1 B
467
+X VI1* 5 -650 4550 300 R 60 60 1 1 B
468
+X VI2* 6 -650 4450 300 R 60 60 1 1 B
469
+X VI3* 7 -650 4350 300 R 60 60 1 1 B
470
+X VI4* 8 -650 4250 300 R 60 60 1 1 B
471
+X VI5* 9 -650 4150 300 R 60 60 1 1 B
472
+X VI6* 10 -650 4050 300 R 60 60 1 1 B
473
+X 0_V1 20 -650 3050 300 R 60 60 1 1 B
474
+X A4 30 -650 2050 300 R 60 60 1 1 B
475
+X DO6_ED6 40 -650 1050 300 R 60 60 1 1 B
476
+X 0_V2 50 -650 50 300 R 60 60 1 1 W
477
+X SIXTN* 60 -650 -950 300 R 60 60 1 1 B
478
+X 0_V4 70 -650 -1950 300 R 60 60 1 1 B
479
+X A1 80 -650 -2950 300 R 60 60 1 1 B
480
+X DO7_ED7 90 -650 -3950 300 R 60 60 1 1 B
481
+X VI7* 11 -650 3950 300 R 60 60 1 1 B
482
+X NDEF1 21 -650 2950 300 R 60 60 1 1 B
483
+X A3 31 -650 1950 300 R 60 60 1 1 B
484
+X D12_OD2 41 -650 950 300 R 60 60 1 1 B
485
+X +8_V 51 -650 -50 300 R 60 60 1 1 W
486
+X A20 61 -650 -1050 300 R 60 60 1 1 B
487
+X RFU4 71 -650 -2050 300 R 60 60 1 1 B
488
+X A2 81 -650 -3050 300 R 60 60 1 1 B
489
+X DI4_OD4 91 -650 -4050 300 R 60 60 1 1 B
490
+X NMI* 12 -650 3850 300 R 60 60 1 1 B
491
+X ADSB* 22 -650 2850 300 R 60 60 1 1 B
492
+X A15 32 -650 1850 300 R 60 60 1 1 B
493
+X D13_OD3 42 -650 850 300 R 60 60 1 1 B
494
+X -16_V 52 -650 -150 300 R 60 60 1 1 W
495
+X A21 62 -650 -1150 300 R 60 60 1 1 B
496
+X RDY 72 -650 -2150 300 R 60 60 1 1 B
497
+X A6 82 -650 -3150 300 R 60 60 1 1 B
498
+X DI5_OD5 92 -650 -4150 300 R 60 60 1 1 B
499
+X PWRFAIL* 13 -650 3750 300 R 60 60 1 1 B
500
+X DODSB* 23 -650 2750 300 R 60 60 1 1 B
501
+X A12 33 -650 1750 300 R 60 60 1 1 B
502
+X D17_OD7 43 -650 750 300 R 60 60 1 1 B
503
+X 0_V3 53 -650 -250 300 R 60 60 1 1 B
504
+X A22 63 -650 -1250 300 R 60 60 1 1 B
505
+X INT* 73 -650 -2250 300 R 60 60 1 1 B
506
+X A7 83 -650 -3250 300 R 60 60 1 1 B
507
+X DI6_OD6 93 -650 -4250 300 R 60 60 1 1 B
508
+X TMA3* 14 -650 3650 300 R 60 60 1 1 B
509
+X PHI 24 -650 2650 300 R 60 60 1 1 B
510
+X A9 34 -650 1650 300 R 60 60 1 1 B
511
+X sM1 44 -650 650 300 R 60 60 1 1 B
512
+X SLAVE_CLR* 54 -650 -350 300 R 60 60 1 1 B
513
+X A23 64 -650 -1350 300 R 60 60 1 1 B
514
+X HOLD* 74 -650 -2350 300 R 60 60 1 1 B
515
+X A8 84 -650 -3350 300 R 60 60 1 1 B
516
+X DI1_OD1 94 -650 -4350 300 R 60 60 1 1 B
517
+X A18 15 -650 3550 300 R 60 60 1 1 B
518
+X pSTVAL* 25 -650 2550 300 R 60 60 1 1 B
519
+X DO1_ED1 35 -650 1550 300 R 60 60 1 1 B
520
+X sOUT 45 -650 550 300 R 60 60 1 1 B
521
+X TMA0* 55 -650 -450 300 R 60 60 1 1 B
522
+X NDEF2 65 -650 -1450 300 R 60 60 1 1 B
523
+X RESET* 75 -650 -2450 300 R 60 60 1 1 B
524
+X A13 85 -650 -3450 300 R 60 60 1 1 B
525
+X DI1_OD1 95 -650 -4450 300 R 60 60 1 1 B
526
+X A16 16 -650 3450 300 R 60 60 1 1 B
527
+X pHDLA 26 -650 2450 300 R 60 60 1 1 B
528
+X DO0_ED0 36 -650 1450 300 R 60 60 1 1 B
529
+X sINP 46 -650 450 300 R 60 60 1 1 B
530
+X TMA1* 56 -650 -550 300 R 60 60 1 1 B
531
+X NDEF3 66 -650 -1550 300 R 60 60 1 1 B
532
+X pSYNC 76 -650 -2550 300 R 60 60 1 1 B
533
+X A14 86 -650 -3550 300 R 60 60 1 1 B
534
+X sINTA 96 -650 -4550 300 R 60 60 1 1 B
535
+X A17 17 -650 3350 300 R 60 60 1 1 B
536
+X RFU_1 27 -650 2350 300 R 60 60 1 1 B
537
+X A10 37 -650 1350 300 R 60 60 1 1 B
538
+X sMEMR 47 -650 350 300 R 60 60 1 1 B
539
+X TMA2* 57 -650 -650 300 R 60 60 1 1 B
540
+X PHANTOM* 67 -650 -1650 300 R 60 60 1 1 B
541
+X pWR* 77 -650 -2650 300 R 60 60 1 1 B
542
+X A11 87 -650 -3650 300 R 60 60 1 1 B
543
+X sWO* 97 -650 -4650 300 R 60 60 1 1 B
544
+X SDSB* 18 -650 3250 300 R 60 60 1 1 B
545
+X RFU_2 28 -650 2250 300 R 60 60 1 1 B
546
+X DO4_ED4 38 -650 1250 300 R 60 60 1 1 B
547
+X sHLTA 48 -650 250 300 R 60 60 1 1 B
548
+X sXTRQ* 58 -650 -750 300 R 60 60 1 1 B
549
+X MWRT 68 -650 -1750 300 R 60 60 1 1 B
550
+X pDBIN 78 -650 -2750 300 R 60 60 1 1 B
551
+X DO2_ED2 88 -650 -3750 300 R 60 60 1 1 B
552
+X ERROR* 98 -650 -4750 300 R 60 60 1 1 B
553
+X CDSB* 19 -650 3150 300 R 60 60 1 1 B
554
+X A5 29 -650 2150 300 R 60 60 1 1 B
555
+X DO5_ED5 39 -650 1150 300 R 60 60 1 1 B
556
+X CLOCK 49 -650 150 300 R 60 60 1 1 B
557
+X A19 59 -650 -850 300 R 60 60 1 1 B
558
+X RFU3 69 -650 -1850 300 R 60 60 1 1 B
559
+X A0 79 -650 -2850 300 R 60 60 1 1 B
560
+X DO3_ED3 89 -650 -3850 300 R 60 60 1 1 B
561
+X POC* 99 -650 -4850 300 R 60 60 1 1 B
562
+X 0_V5 100 -650 -4950 300 R 60 60 1 1 W
563
+ENDDRAW
564
+ENDDEF
565
+#
566
+# TIP29
567
+#
568
+DEF TIP29 Q 0 0 Y Y 1 F N
569
+F0 "Q" 0 -150 50 H V R CNN
570
+F1 "TIP29" 0 150 50 H V R CNN
571
+DRAW
572
+C 50 0 111 0 1 10 N
573
+P 2 0 1 0  0 0  100 100 N
574
+P 3 0 1 10  0 75  0 -75  0 -75 N
575
+P 3 0 1 0  50 -50  0 0  0 0 N
576
+P 3 0 1 0  90 -90  100 -100  100 -100 N
577
+P 5 0 1 0  90 -90  70 -30  30 -70  90 -90  90 -90 F
578
+X E 1 100 -200 100 U 40 40 1 1 P
579
+X B 2 -200 0 200 R 40 40 1 1 I
580
+X C 3 100 200 100 D 40 40 1 1 P
581
+ENDDRAW
582
+ENDDEF
583
+#
584
+# TIP30
585
+#
586
+DEF TIP30 Q 0 0 Y Y 1 F N
587
+F0 "Q" 0 -150 60 H V R CNN
588
+F1 "TIP30" 0 150 60 H V R CNN
589
+DRAW
590
+C 50 0 111 0 1 10 N
591
+P 2 0 1 0  0 0  100 100 N
592
+P 3 0 1 10  0 75  0 -75  0 -75 F
593
+P 3 0 1 0  25 -25  0 0  0 0 N
594
+P 3 0 1 0  100 -100  65 -65  65 -65 N
595
+P 5 0 1 0  25 -25  50 -75  75 -50  25 -25  25 -25 F
596
+X E 1 100 -200 100 U 40 40 1 1 P
597
+X B 2 -200 0 200 R 40 40 1 1 I
598
+X C 3 100 200 100 D 40 40 1 1 P
599
+ENDDRAW
600
+ENDDEF
601
+#
602
+# WD2793
603
+#
604
+DEF WD2793 U 0 40 Y Y 1 F N
605
+F0 "U" 0 -450 60 H V C CNN
606
+F1 "WD2793" 0 550 60 H V C CNN
607
+DRAW
608
+S -600 1150 600 -1150 0 1 0 N
609
+X ENP 1 -900 1100 300 R 50 50 1 1 I
610
+X WE 2 -900 800 300 R 50 50 1 1 I I
611
+X CS 3 -900 700 300 R 50 50 1 1 I I
612
+X RE 4 -900 600 300 R 50 50 1 1 I I
613
+X A0 5 -900 450 300 R 50 50 1 1 I
614
+X DAL0 7 900 -150 300 L 50 50 1 1 B
615
+X DAL1 8 900 -250 300 L 50 50 1 1 B
616
+X DAL2 9 900 -350 300 L 50 50 1 1 B
617
+X A1 ~ -900 350 300 R 50 50 1 1 I
618
+X DAL3 10 900 -450 300 L 50 50 1 1 B
619
+X WG 30 900 400 300 L 50 50 1 1 O
620
+X HLT 40 -900 -1100 300 R 50 50 1 1 I
621
+X DAL4 11 900 -550 300 L 50 50 1 1 B
622
+X WD 31 900 300 300 L 50 50 1 1 O
623
+X DAL5 12 900 -650 300 L 50 50 1 1 B
624
+X TEST 22 -900 -100 300 R 50 50 1 1 I I
625
+X READY 32 -900 -500 300 R 50 50 1 1 I
626
+X DAL6 13 900 -750 300 L 50 50 1 1 B
627
+X PUMP 23 900 700 300 L 50 50 1 1 O
628
+X WPW 33 -900 -600 300 R 50 50 1 1 I
629
+X DAL7 14 900 -850 300 L 50 50 1 1 B
630
+X CLK 24 -900 200 300 R 50 50 1 1 I
631
+X TR00 34 -900 -700 300 R 50 50 1 1 I I
632
+X STEP 15 900 900 300 L 50 50 1 1 O
633
+X ENMF 25 -900 -200 300 R 50 50 1 1 I I
634
+X IP 35 -900 -800 300 R 50 50 1 1 I I
635
+X DIRC 16 900 800 300 L 50 50 1 1 O
636
+X VCO 26 -900 -300 300 R 50 50 1 1 I
637
+X WRPT 36 -900 -900 300 R 50 50 1 1 I I
638
+X /5/8 17 -900 100 300 R 50 50 1 1 I
639
+X RAW_READ 27 -900 -400 300 R 50 50 1 1 I I
640
+X DDEN 37 -900 -1000 300 R 50 50 1 1 I I
641
+X RPW 18 -900 0 300 R 50 50 1 1 I
642
+X HLD 28 900 600 300 L 50 50 1 1 O
643
+X DRQ 38 900 1100 300 L 50 50 1 1 O
644
+X MR 19 -900 1000 300 R 50 50 1 1 I I
645
+X TG43 29 900 500 300 L 50 50 1 1 O
646
+X INTRQ 39 900 1000 300 L 50 50 1 1 O
647
+ENDDRAW
648
+ENDDEF
649
+#
650
+#End Library

+ 34
- 0
RTC72421.lib View File

@@ -0,0 +1,34 @@
1
+EESchema-LIBRARY Version 2.3
2
+#encoding utf-8
3
+#
4
+# RTC72421
5
+#
6
+DEF RTC72421 U 0 40 Y Y 1 F N
7
+F0 "U" 0 150 60 H V C CNN
8
+F1 "RTC72421" 0 -150 60 H V C CNN
9
+F2 "" 0 0 60 H V C CNN
10
+F3 "" 0 0 60 H V C CNN
11
+DRAW
12
+S -500 700 500 -700 0 1 0 N
13
+X STD_P 1 -800 -300 300 R 50 50 1 1 O
14
+X *CS0 2 -800 -400 300 R 50 50 1 1 I
15
+X ALE 3 -800 -600 300 R 50 50 1 1 I
16
+X A0 4 -800 600 300 R 50 50 1 1 I
17
+X A1 5 -800 500 300 R 50 50 1 1 I
18
+X A2 6 -800 400 300 R 50 50 1 1 I
19
+X A3 7 -800 300 300 R 50 50 1 1 I
20
+X *RD 8 -800 0 300 R 50 50 1 1 I I
21
+X GND 9 -100 -1000 300 U 50 50 1 1 W N
22
+X *WR 10 -800 -100 300 R 50 50 1 1 I I
23
+X D3 11 800 600 300 L 50 50 1 1 B
24
+X D2 12 800 500 300 L 50 50 1 1 B
25
+X D1 13 800 400 300 L 50 50 1 1 B
26
+X D0 14 800 300 300 L 50 50 1 1 B
27
+X CS1 15 800 100 300 L 50 50 1 1 I I
28
+X OSCIN 16 800 -200 300 L 50 50 1 1 N N
29
+X OSCOUT 17 800 -500 300 L 50 50 1 1 N N
30
+X VIN 18 -100 1000 300 D 50 50 1 1 W
31
+ENDDRAW
32
+ENDDEF
33
+#
34
+#End Library

+ 2196
- 0
am29-memory.lib
File diff suppressed because it is too large
View File


+ 56
- 0
ay-3-8910.lib View File

@@ -0,0 +1,56 @@
1
+EESchema-LIBRARY Version 2.3
2
+#encoding utf-8
3
+#
4
+# AY-3-8910
5
+#
6
+DEF AY-3-8910 U 0 40 Y Y 1 F N
7
+F0 "U" -100 750 60 H V C CNN
8
+F1 "AY-3-8910" 50 350 60 H V C CNN
9
+F2 "" 0 0 60 H V C CNN
10
+F3 "" 0 0 60 H V C CNN
11
+DRAW
12
+S -400 -1200 400 1200 0 1 0 N
13
+X GND 1 -50 -1500 300 U 50 50 1 1 W N
14
+X NC2 2 -700 -850 300 R 50 50 1 1 I
15
+X OUTB 3 700 -750 300 L 50 50 1 1 O
16
+X OUTA 4 700 -650 300 L 50 50 1 1 O
17
+X NC5 5 -700 -950 300 R 50 50 1 1 I
18
+X IOB7 6 700 -450 300 L 50 50 1 1 B
19
+X IOB6 7 700 -350 300 L 50 50 1 1 B
20
+X IOB5 8 700 -250 300 L 50 50 1 1 B
21
+X IOB4 9 700 -150 300 L 50 50 1 1 B
22
+X IOB3 10 700 -50 300 L 50 50 1 1 B
23
+X IOA1 20 700 1050 300 L 50 50 1 1 B
24
+X D7 30 -700 750 300 R 50 50 1 1 B
25
+X VCC 40 -50 1500 300 D 50 50 1 1 W N
26
+X IOB2 11 700 50 300 L 50 50 1 1 B
27
+X IOA0 21 700 1150 300 L 50 50 1 1 B
28
+X D6 31 -700 650 300 R 50 50 1 1 B
29
+X IOB1 12 700 150 300 L 50 50 1 1 B
30
+X CLOCK 22 -700 1150 300 R 50 50 1 1 I
31
+X D5 32 -700 550 300 R 50 50 1 1 B
32
+X IOB0 13 700 250 300 L 50 50 1 1 B
33
+X RESET 23 -700 950 300 R 50 50 1 1 I I
34
+X D4 33 -700 450 300 R 50 50 1 1 B
35
+X IOA7 14 700 450 300 L 50 50 1 1 B
36
+X A9 24 -700 -250 300 R 50 50 1 1 I I
37
+X D3 34 -700 350 300 R 50 50 1 1 B
38
+X IOA6 15 700 550 300 L 50 50 1 1 B
39
+X A8 25 -700 -150 300 R 50 50 1 1 I
40
+X D2 35 -700 250 300 R 50 50 1 1 B
41
+X IOA5 16 700 650 300 L 50 50 1 1 B
42
+X TEST2 26 -700 -1150 300 R 50 50 1 1 I
43
+X D1 36 -700 150 300 R 50 50 1 1 B
44
+X IOA4 17 700 750 300 L 50 50 1 1 B
45
+X BDIR 27 -700 -450 300 R 50 50 1 1 I
46
+X D0 37 -700 50 300 R 50 50 1 1 B
47
+X IOA3 18 700 850 300 L 50 50 1 1 B
48
+X BC2 28 -700 -650 300 R 50 50 1 1 I
49
+X OUTC 38 700 -850 300 L 50 50 1 1 O
50
+X IOA2 19 700 950 300 L 50 50 1 1 B
51
+X BC1 29 -700 -550 300 R 50 50 1 1 I
52
+X TEST1 39 -700 -1050 300 R 50 50 1 1 I
53
+ENDDRAW
54
+ENDDEF
55
+#
56
+#End Library

+ 50
- 0
conn_17x2.lib View File

@@ -0,0 +1,50 @@
1
+EESchema-LIBRARY Version 2.3
2
+#encoding utf-8
3
+#
4
+# CONN_17X2
5
+#
6
+DEF CONN_17X2 P 0 10 Y N 1 F N
7
+F0 "P" 0 900 60 H V C CNN
8
+F1 "CONN_17X2" 0 50 50 V V C CNN
9
+F2 "" 0 -150 60 H V C CNN
10
+F3 "" 0 -150 60 H V C CNN
11
+DRAW
12
+S -100 850 100 -850 0 1 0 N
13
+X P1 1 -400 800 300 R 60 30 1 1 P I
14
+X P2 2 400 800 300 L 60 30 1 1 P I
15
+X P3 3 -400 700 300 R 60 30 1 1 P I
16
+X P4 4 400 700 300 L 60 30 1 1 P I
17
+X P5 5 -400 600 300 R 60 30 1 1 P I
18
+X P6 6 400 600 300 L 60 30 1 1 P I
19
+X P7 7 -400 500 300 R 60 30 1 1 P I
20
+X P8 8 400 500 300 L 60 30 1 1 P I
21
+X P9 9 -400 400 300 R 60 30 1 1 P I
22
+X P10 10 400 400 300 L 60 30 1 1 P I
23
+X P20 20 400 -100 300 L 60 30 1 1 P I
24
+X P30 30 400 -600 300 L 60 30 1 1 P I
25
+X P11 11 -400 300 300 R 60 30 1 1 P I
26
+X P21 21 -400 -200 300 R 60 30 1 1 P I
27
+X P31 31 -400 -700 300 R 60 30 1 1 P I
28
+X P12 12 400 300 300 L 60 30 1 1 P I
29
+X P22 22 400 -200 300 L 60 30 1 1 P I
30
+X P32 32 400 -700 300 L 60 30 1 1 P I
31
+X P13 13 -400 200 300 R 60 30 1 1 P I
32
+X P23 23 -400 -300 300 R 60 30 1 1 P I
33
+X P33 33 -400 -800 300 R 60 30 1 1 P I
34
+X P14 14 400 200 300 L 60 30 1 1 P I
35
+X P24 24 400 -300 300 L 60 30 1 1 P I
36
+X P34 34 400 -800 300 L 60 30 1 1 P I
37
+X P15 15 -400 100 300 R 60 30 1 1 P I
38
+X ~ 25 -400 -400 300 R 60 30 1 1 P I
39
+X P16 16 400 100 300 L 60 30 1 1 P I
40
+X P26 26 400 -400 300 L 60 30 1 1 P I
41
+X P17 17 -400 0 300 R 60 30 1 1 P I
42
+X P27 27 -400 -500 300 R 60 30 1 1 P I
43
+X P18 18 400 0 300 L 60 30 1 1 P I
44
+X P28 28 400 -500 300 L 60 30 1 1 P I
45
+X P19 19 -400 -100 300 R 60 30 1 1 P I
46
+X P29 29 -400 -600 300 R 60 30 1 1 P I
47
+ENDDRAW
48
+ENDDEF
49
+#
50
+#End Library

+ 61
- 0
mc68681-PLCC.lib View File

@@ -0,0 +1,61 @@
1
+EESchema-LIBRARY Version 2.3
2
+#encoding utf-8
3
+#
4
+# MC68681P-PLCC
5
+#
6
+DEF MC68681P-PLCC U 0 40 Y Y 2 L N
7
+F0 "U" -400 1225 50 H V L BNN
8
+F1 "MC68681P-PLCC" -400 -1400 50 H V L BNN
9
+F2 "micro-mc68000-PLCC44" 0 150 50 H I C CNN
10
+F3 "" 0 0 60 H V C CNN
11
+DRAW
12
+P 2 1 0 0  -400 -1300  -400 1200 N
13
+P 2 1 0 0  -400 -1300  400 -1300 N
14
+P 2 1 0 0  400 1200  -400 1200 N
15
+P 2 1 0 0  400 1200  400 -1300 N
16
+T 1 50 -155 50 0 2 0 GND  Normal 0 C C
17
+T 1 50 170 50 0 2 0 VCC  Normal 0 C C
18
+X RS1 2 -600 0 200 R 40 40 1 1 I
19
+X IP3 3 -600 -800 200 R 40 40 1 1 I
20
+X RS2 4 -600 -100 200 R 40 40 1 1 I
21
+X IP1 5 -600 -600 200 R 40 40 1 1 I
22
+X RS3 6 -600 -200 200 R 40 40 1 1 I
23
+X RS4 7 -600 -300 200 R 40 40 1 1 I
24
+X IP0 8 -600 -500 200 R 40 40 1 1 I
25
+X R/W\ 9 -600 300 200 R 40 40 1 1 I
26
+X DTACK 10 -600 200 200 R 40 40 1 1 O I
27
+X D5 20 600 -1000 200 L 40 40 1 1 B
28
+X OP4 30 600 0 200 L 40 40 1 1 O
29
+X IP2 40 -600 -700 200 R 40 40 1 1 I
30
+X RXDB 11 600 800 200 L 40 40 1 1 I
31
+X D7 21 600 -1200 200 L 40 40 1 1 B
32
+X OP2 31 600 200 200 L 40 40 1 1 O
33
+X IACK 41 -600 600 200 R 40 40 1 1 I I
34
+X OP0 32 600 400 200 L 40 40 1 1 O
35
+X IP5 42 -600 -1000 200 R 40 40 1 1 I
36
+X TXDB 13 600 900 200 L 40 40 1 1 B
37
+X TXDA 33 600 1100 200 L 40 40 1 1 O
38
+X IP4 43 -600 -900 200 R 40 40 1 1 I
39
+X OP1 14 600 300 200 L 40 40 1 1 O
40
+X IRQ 24 600 600 200 L 40 40 1 1 O I
41
+X OP3 15 600 100 200 L 40 40 1 1 O
42
+X D6 25 600 -1100 200 L 40 40 1 1 B
43
+X RXDA 35 600 1000 200 L 40 40 1 1 I
44
+X OP5 16 600 -100 200 L 40 40 1 1 O
45
+X D4 26 600 -900 200 L 40 40 1 1 B
46
+X X1/CLK 36 -600 1100 200 R 40 40 1 1 I C
47
+X OP7 17 600 -300 200 L 40 40 1 1 O
48
+X D2 27 600 -700 200 L 40 40 1 1 B
49
+X X2 37 -600 1000 200 R 40 40 1 1 O
50
+X D1 18 600 -600 200 L 40 40 1 1 B
51
+X D0 28 600 -500 200 L 40 40 1 1 B
52
+X RESET 38 -600 800 200 R 40 40 1 1 I I
53
+X D3 19 600 -800 200 L 40 40 1 1 B
54
+X OP6 29 600 -200 200 L 40 40 1 1 O
55
+X CS 39 -600 400 200 R 40 40 1 1 I I
56
+X GND 22 0 -300 200 U 40 40 2 1 W
57
+X VCC 44 0 300 200 D 40 40 2 1 W
58
+ENDDRAW
59
+ENDDEF
60
+#
61
+#End Library

+ 5269
- 0
micro-intel.lib
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+ 1763
- 0
micro-mc68000.lib
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+ 449
- 0
mini_din.lib View File

@@ -0,0 +1,449 @@
1
+EESchema-LIBRARY Version 2.3  29/04/2008-12:23:07
2
+# Converted with eagle2kicad.ulp Version 0.9
3
+# Device count = 7
4
+#
5
+# Dev Name: MINI_DIN_3
6
+# Package Name: M_DIN3
7
+# Dev Tech: ''
8
+# Dev Prefix: X
9
+# Gate count = 1
10
+#
11
+DEF MINI_DIN_3 X 0 40 Y Y 1 L N
12
+# Gate Name: G$1
13
+# Symbol Name: M_DIN3
14
+F0 "X" -400 525 50 H V L B
15
+F1 "MINI_DIN_3" 0 525 50 H V L B
16
+F2 "mini_din-M_DIN3" 0 150 50 H I C C
17
+DRAW
18
+P 6 1 1 0     120 -170 120 -110 120 -110 220 -110 220 -110 120 -170 F
19
+P 6 1 1 0     -120 -170 -120 -110 -120 -110 -220 -110 -220 -110 -120 -170 F
20
+A 200 100 25 -899 899 1 1 0 N 200 75 200 125
21
+A -200 100 25 -2699 -901 1 1 0 N -200 125 -200 75
22
+P 2 1 0 0 -50 350 50 350
23
+P 2 1 0 0 -400 -300 400 -300
24
+P 2 1 0 0 400 500 400 -300
25
+P 2 1 0 0 400 500 -400 500
26
+P 2 1 0 0 -400 -300 -400 500
27
+P 2 1 0 0 -300 100 -225 100
28
+P 2 1 0 0 225 100 300 100
29
+P 2 1 0 0 -50 350 -50 450
30
+P 2 1 0 0 -50 450 50 450
31
+P 2 1 0 0 50 450 50 350
32
+A 0 210 25 -3599 -1801 1 1 0 N 25 210 -25 210
33
+P 2 1 0 0 0 235 0 300
34
+P 2 1 0 0 0 300 -300 300
35
+P 2 1 0 0 -350 -250 0 -250
36
+P 2 1 0 0 0 -250 0 -200
37
+P 2 1 0 0 0 -250 350 -250
38
+S -50 350 50 450 1 1 0 F
39
+S -50 -225 50 -175 1 1 0 F
40
+S -70 -90 70 80 1 1 0 F
41
+C 0 100 300 1 1 0 N
42
+T 0 295 -195 60 0 1 0 PE
43
+T 0 -280 -195 60 0 1 0 PE
44
+T 0 160 105 70 0 1 0 3
45
+T 0 -145 105 70 0 1 0 5
46
+T 0 50 275 70 0 1 0 7
47
+X 3 3 600 100 300 L 40 40 1 1 P 
48
+X 5 5 -600 100 300 R 40 40 1 1 P 
49
+X 7 7 -600 300 300 R 40 40 1 1 P 
50
+X PE1 SH1 500 -200 100 L 40 40 1 1 W 
51
+X PE2 SH2 0 -400 200 U 40 40 1 1 W 
52
+X PE3 SH3 -500 -200 100 R 40 40 1 1 W 
53
+ENDDRAW
54
+ENDDEF
55
+
56
+#
57
+# Dev Name: MINI_DIN_4
58
+# Package Name: M_DIN4
59
+# Dev Tech: ''
60
+# Dev Prefix: X
61
+# Gate count = 1
62
+#
63
+DEF MINI_DIN_4 X 0 40 Y Y 1 L N
64
+# Gate Name: G$1
65
+# Symbol Name: M_DIN4
66
+F0 "X" -400 525 50 H V L B
67
+F1 "MINI_DIN_4" 0 525 50 H V L B
68
+F2 "mini_din-M_DIN4" 0 150 50 H I C C
69
+DRAW
70
+P 6 1 1 0     120 -170 120 -110 120 -110 220 -110 220 -110 120 -170 F
71
+P 6 1 1 0     -120 -170 -120 -110 -120 -110 -220 -110 -220 -110 -120 -170 F
72
+A 200 100 25 -899 899 1 1 0 N 200 75 200 125
73
+A -200 100 25 -2699 -901 1 1 0 N -200 125 -200 75
74
+P 2 1 0 0 -50 350 50 350
75
+P 2 1 0 0 -400 -300 400 -300
76
+P 2 1 0 0 400 500 400 -300
77
+P 2 1 0 0 400 500 -400 500
78
+P 2 1 0 0 -400 -300 -400 500
79
+P 2 1 0 0 -300 100 -225 100
80
+P 2 1 0 0 225 100 300 100
81
+P 2 1 0 0 -50 350 -50 450
82
+P 2 1 0 0 -50 450 50 450
83
+P 2 1 0 0 50 450 50 350
84
+A 150 200 25 -899 899 1 1 0 N 150 175 150 225
85
+A -150 200 25 -2699 -901 1 1 0 N -150 225 -150 175
86
+P 2 1 0 0 -200 200 -175 200
87
+P 2 1 0 0 175 200 225 200
88
+P 2 1 0 0 -350 -250 0 -250
89
+P 2 1 0 0 0 -250 0 -200
90
+P 2 1 0 0 0 -250 350 -250
91
+S -50 350 50 450 1 1 0 F
92
+S -50 -225 50 -175 1 1 0 F
93
+S -80 -70 80 20 1 1 0 F
94
+C 0 100 300 1 1 0 N
95
+T 0 -95 205 70 0 1 0 8
96
+T 0 295 -195 60 0 1 0 PE
97
+T 0 -280 -195 60 0 1 0 PE
98
+T 0 160 105 70 0 1 0 3
99
+T 0 -145 105 70 0 1 0 5
100
+T 0 105 205 70 0 1 0 6
101
+X 3 3 600 100 300 L 40 40 1 1 P 
102
+X 5 5 -600 100 300 R 40 40 1 1 P 
103
+X 6 6 500 200 300 L 40 40 1 1 P 
104
+X 8 8 -500 200 300 R 40 40 1 1 P 
105
+X PE1 SH1 500 -200 100 L 40 40 1 1 W 
106
+X PE2 SH2 0 -400 200 U 40 40 1 1 W 
107
+X PE3 SH3 -500 -200 100 R 40 40 1 1 W 
108
+ENDDRAW
109
+ENDDEF
110
+
111
+#
112
+# Dev Name: MINI_DIN_5
113
+# Package Name: M_DIN5
114
+# Dev Tech: ''
115
+# Dev Prefix: X
116
+# Gate count = 1
117
+#
118
+DEF MINI_DIN_5 X 0 40 Y Y 1 L N
119
+# Gate Name: G$1
120
+# Symbol Name: M_DIN5
121
+F0 "X" -400 525 50 H V L B
122
+F1 "MINI_DIN_5" 0 525 50 H V L B
123
+F2 "mini_din-M_DIN5" 0 150 50 H I C C
124
+DRAW
125
+P 6 1 1 0     120 -170 120 -110 120 -110 220 -110 220 -110 120 -170 F
126
+P 6 1 1 0     -120 -170 -120 -110 -120 -110 -220 -110 -220 -110 -120 -170 F
127
+A 200 100 25 -899 899 1 1 0 N 200 75 200 125